AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 146

IC MCU ARM9 64K SRAM 144LFBGA

AT91SAM9R64-CU-999

Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9R64-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9R64-CU-999
Manufacturer:
Atmel
Quantity:
10 000
21.4.2
Figure 21-2. EBI Connections to Memory Devices
21.5
21.5.1
21.6
6289C–ATARM–28-May-09
Product Dependencies
Functional Description
Connection Examples
I/O Lines
EBI
A1/NWR2/NBS2
NWR1/NBS1
NWR3/NBS3
NWR0/NWE
NCS1/SDCS
Figure 21-2
The pins used for interfacing the External Bus Interface may be multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the External Bus Interface pins
to their peripheral function. If I/O lines of the External Bus Interface are not used by the applica-
tion, they can be used for other purposes by the PIO Controller.
The EBI transfers data between the internal AHB Bus (handled by the Bus Matrix) and the exter-
nal memories or peripheral devices. It controls the waveforms and the parameters of the
external address, data and control buses and is composed of the following elements:
NRD/NOE
A0/NBS0
A16/BA0
A17/BA1
A18-A25
• the Static Memory Controller (SMC)
• the SDRAM Controller (SDRAMC)
D0-D31
A2-A15
SDCKE
SDA10
SDCK
SDWE
NCS2
NCS3
NCS4
NCS5
NCS0
RAS
CAS
shows an example of connections between the EBI and external devices.
A0/NWR0/NBS0
NRD/NOE
D0-D7
D16-D23
D0-D7
NBS0
SDWE
SDWE
NBS2
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
OE
WE
128K x 8
SRAM
SDRAM
SDRAM
2M x 8
2M x 8
A0-A9, A11
A0-A9, A11
A0-A16
BA0
BA1
A10
BA0
BA1
A10
AT91SAM9R64/RL64 Preliminary
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A1-A17
D8-D15
NWR1/NBS1
NRD/NOE
D24-D31
D8-D15
SDWE
SDWE
NBS3
NBS1
D0-D7
CS
OE
WE
128K x 8
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
SRAM
SDRAM
2M x 8
SDRAM
2M x 8
A0-A16
A0-A9, A11
A0-A9, A11
BA0
BA1
A10
BA0
BA1
A10
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A1-A17
A2-A11, A13
SDA10
A16/BA0
A17/BA1
146

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