AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 715

• Manufacturer Part Number: AT91SAM9R64-CU-999
• Description: IC MCU ARM9 64K SRAM 144LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, UART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

40.6.2.7
6289C–ATARM–28-May-09
31
31
31
31
31
31
To Transmit a Word Stored in Big Endian Format on AC-link
To Transmit A Halfword Stored in Big Indian Format on AC-link
To Transmit a10-bit Sample Stored in Big Endian Format on AC-link
Byte0[7:0]
Endianness
–
–
–
–
–
The application can disable event interrupts by writing in AC’97 Controller Interrupt Disable Reg-
ister (AC97C_IDR). The AC‘97 Controller Interrupt Mask Register (AC97C_IMR) shows which
event can trigger an interrupt and which one cannot.
Endianness can be managed automatically for each channel, except for the Codec channel, by
writing to Channel Endianness Mode (CEM) in AC97C_CxMR. This enables transferring data on
AC-link in Big Endian format without any additional operation.
Word to be written in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(as it is stored in memory or microprocessor register).
Word stored in Channel x Transmit Holding Register (AC97C_CxTHR) (data to transmit)
Data transmitted on appropriate slot: data[19:0] = {Byte2[3:0], Byte1[7:0], Byte0[7:0]}.
Halfword to be written in AC’97 Controller Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(data to transmit).
Data emitted on related slot: data[19:0] = {0x0, Byte1[7:0], Byte0[7:0]}.
Halfword to be written in AC’97 Controller Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC’97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(data to transmit).
Data emitted on related slot: data[19:0] = {0x000, Byte1[1:0], Byte0[7:0]}.
24
24
24
24
24
24
23
23
23
23
23
23
–
Byte1[7:0]
20
–
–
–
–
19
Byte2[3:0]
16
16
16
16
16
16
AT91SAM9R64/RL64 Preliminary
15
15
15
15
15
15
–
Byte1[7:0]
Byte1[7:0]
Byte2[7:0]
Byte0[7:0]
Byte0[7:0]
10
Byte1
9
[1:0]
8
8
8
8
8
8
7
7
7
7
7
7
{0x00, Byte1[1:0]}
Byte3[7:0]
Byte0[7:0]
Byte1[7:0]
Byte0[7:0]
Byte0[7:0]
.
715
0
0
0
0
0
0