LPC3141FET180,551 NXP Semiconductors, LPC3141FET180,551 Datasheet - Page 27

• Manufacturer Part Number: LPC3141FET180,551
• Description: IC ARM9 MCU USB OTG 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3141FET180,551

• Package / Case: 180-TFBGA
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 270MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, PWM, WDT
• Number Of I /o: 20
• Program Memory Type: ROMless
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJS
• Data Bus Width: 32 bit
• Data Ram Size: 192 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 270 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11037
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935289711551

NXP Semiconductors
LPC3141_3143
Preliminary data sheet
6.17 Input/Output Configuration module (IOCONFIG)
6.18 10-bit Analog-to-Digital Converter (ADC10B)
The General Purpose Input/Output (GPIO) pins can be controlled through the register
interface provided by the IOCONFIG module. Next to several dedicated GPIO pins, most
digital IO pins can also be used as GPIO if they are not required for their normal,
dedicated function.
This module has the following features:
This module is a 10-bit successive approximation ADC with an input multiplexer to allow
for multiple analog signals on its input. A common use of this module is to read out
multiple keys on one input from a resistor network.
This module has the following features:
Fig 7. Block diagram of the Watchdog Timer
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After a reset, a register will indicate whether a reset has occurred because of a
watchdog generated reset.
Watchdog timer can also be used as a normal timer in addition to the watchdog
functionality (output m0).
Provides control for the digital pins that can double as GPIO (next to their normal
function). The pinning list in
Each controlled pin can be configured for 4 operational modes:
– Normal operation (i.e. controlled by a function block)
– Driven LOW
– Driven HIGH
– High impedance/input
A GPIO pin can be observed (read) in any mode.
The register interface provides ‘set’ and ‘clear’ access methods for choosing the
operational mode.
Four analog input channels, selected by an analog multiplexer.
Programmable ADC resolution from 2 bit to 10 bit.
The maximum conversion rate is 400 kSamples/s for 10 bit resolution and
1500 kSamples/s for 2 bit resolution.
Single and continuous analog-to-digital conversion scan modes.
Power-down mode.
APB
All information provided in this document is subject to legal disclaimers.
Rev. 0.16 — 27 May 2010
WDT
m1
m0
Table 4
EVENT ROUTER
indicates which pins can double as GPIO.
CGU
reset
CONTROLLER
LPC3141/3143
INTERRUPT
002aae086
© NXP B.V. 2010. All rights reserved.
FIQ
IRQ
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