LPC3141FET180,551 NXP Semiconductors, LPC3141FET180,551 Datasheet - Page 37

IC ARM9 MCU USB OTG 180TFBGA

LPC3141FET180,551

Manufacturer Part Number
LPC3141FET180,551
Description
IC ARM9 MCU USB OTG 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC3000r
Datasheet

Specifications of LPC3141FET180,551

Package / Case
180-TFBGA
Core Processor
ARM9
Core Size
32-Bit
Speed
270MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, PWM, WDT
Number Of I /o
20
Program Memory Type
ROMless
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC31
Core
ARM926EJS
Data Bus Width
32 bit
Data Ram Size
192 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
270 MHz
Number Of Timers
5
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11037
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935289711551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3141FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC3141_3143
Preliminary data sheet
6.32.1 I
The I
2
S AHB interface
Supports DMA transfers.
Transmit FIFO (I
Supports single 16 bit transfers to/from the left or right FIFO.
Supports single 24 bit transfers to/from the left or right FIFO.
Supports 32-bit interleaved transfers, with the lower 16 bits representing the left audio
sample, and the higher 16 bits representing the right audio sample.
Supports two 16-bit audio samples combined in a 32-bit word (2 left or 2 right
samples) to reduce busload.
Provides maskable interrupts for audio status.
(FIFO underrun/overrun/full/half_full/not empty for left and right channel separately).
2
S AHB interface has the following features:
All information provided in this document is subject to legal disclaimers.
2
S transmit) or receive FIFO (I
Rev. 0.16 — 27 May 2010
2
S receive) of 4 stereo samples.
LPC3141/3143
© NXP B.V. 2010. All rights reserved.
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