P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 64

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
1996 Jun 27
handbook, full pagewidth
8-bit microcontroller with on-chip CAN
INT0
CT0I
INT1
CT1I
CT2I
CT3I
OVERFLOW
CAPTURE 0
COMPARE 0
OVERFLOW
INTERRUPT
COMPARE 1
OVERFLOW
COMPARE 2
SERIAL
PORT 0
INTERRUPT
REQUEST 1
CAPTURE 2
CAPTURE 3
REQUEST 0
CAPTURE 1
EXTERNAL
EXTERNAL
UART
TIMER T2
TIMER 2
TIMER 0
PORT 1
TIMER 2
TIMER 1
TIMER 2
TIMER 2
SERIAL
TIMER 2
TIMER 2
TIMER 2
interrupt
sources
CAN
ADC
T
R
source enable
interrupt enable registers
Fig.21 Interrupt system.
global enable
64
interrupt priority
registers
a1
a2
b1
b2
c1
c2
d1
d2
e1
e2
f1
f2
g1
g2
h1
h2
i1
i2
j1
j2
k1
k2
l1
l2
m1
m2
n1
n2
o1
o2
m2
m1
a2
b2
d2
e2
g2
h2
n2
o2
c2
k2
a1
b1
d1
e1
g1
h1
n1
o1
c1
k1
f2
i2
j2
l2
f1
i1
j1
l1
IDENTIFICATION
IDENTIFICATION
polling hardware
SOURCE
SOURCE
Product specification
MGA166
P8xC592
interrupt
interrupt
request
request
priority
priority
high
vector
vector
low