P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 91

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
22 CAN APPLICATION INFORMATION
22.1
Real-time applications require the ability to process and
transfer information in a limited and predetermined period
of time. If knowing this total time and the time required to
process the information, the (maximum allowed) transfer
delay time is given.
22.1.1
The maximum allowed bit-time (t
Where:
Example:
For the calculation of n
time is calculated for):
giving:
Where:
1996 Jun 27
t
the maximum allowed transfer delay time (application-specific).
n
the maximum latency time (in terms of number of bits), which depends on the
actual state of the CAN network (e.g. another message already on the network);
n
the number of bits of a message; it varies with the number of transferred data bytes
n
since at maximum one-bit-time ago another CAN-controller is transmitting.
a single error occurs during the transmission of that message preceding ours, leading to the additional transfer of one
Error Frame
‘our message’ has the highest priority,
The additional 18 bits are due to the Error Frame and the Intermission Field preceding ‘our message’.
n
CAN network.
8-bit microcontroller with on-chip CAN
MAX TRANSFER TIME
BIT, MAX LATENCY
BIT, MESSAGE
DATA BYTES
DATA BYTES, WORST CASE
Latency time requirements
M
AXIMUM ALLOWED BIT
(0..8) and Stuffbits like:
:
:
:
BIT, MAX LATENCY
denotes the number of data bytes contained by the longest message being used in a given
44
n
n
BIT, MAX LATENCY
-
BIT, MAX LATENCY
TIME CALCULATION
+
BIT
8.n
) due to latency time requirements can be calculated as:
t
DATA BYTES
BIT
the following is assumed (the term ‘our message’ refers to that one the latency
-------------------------------------------------------------------------------------------- -
n
BIT, MAX LATENCY
52
44
n
t
BIT, MESSAGE
+
MAX TRANSFER TIME
+
10.n
8.n
DATA BYTES, WORST CASE
91
DATA BYTES, WORST CASE
It is measured from the initiation of the transfer up to the
signalling of reception.
For instance, this is the period of time between
programming the CAN Command Register bit 0
(Transmission Request) to HIGH and the time getting an
interrupt at a receiving CAN-device (due to the reception
of the respective message).
+
n
BIT, MESSAGE
52
+
10.n
DATABYTES
+
+
18
18
Product specification
P8xC592
(1)
(2)
(3)
(4)