R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 1121

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
Section 21 Flash Memory
21.4.4
Program
This command writes data to the flash memory in 2-word units.
Write H'41xx in the first bus cycle and write data to the target address in the second and third bus
cycles; the flash memory starts automatic writing (programming and verifying data). The address
value specified in the first bus cycle should be the same even address as that specified in the
second bus cycle.
Completion of automatic writing can be checked through the FMRDY bit in FLMSTR. The
FMRDY bit is 0 (busy) during automatic writing and becomes 1 (ready) when writing is
completed.
After automatic writing is completed, the result can be checked through the FMPRSF bit in
FMRSTR (refer to section 21.6, Full Status Check).
Once an address is programmed, no additional data can be written to the address. Figure 21.3
shows a flowchart of the program command processing.
In the EW0 mode, the read status register mode is entered as soon as automatic writing starts, and
the status register can be read. The SR7 bit in the status register becomes 0 when automatic
writing starts and returns to 1 when writing is completed. In this case, the flash memory stays in
the read status register mode until a read array command is issued. After automatic writing is
completed, the result of writing can be checked by reading the status register.
REJ09B0466-0350 Rev. 3.50
Page 1091 of 1372
Jul 09, 2010

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