R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 731

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
This LSI has two on-chip 16-bit timer pulse units (TPU: unit 0 and unit 1) which each comprises
six 16-bit timer channels, resulting in a total of 12 channels. The functions of unit 0 are listed in
table 11.1, and the functions of unit 1 are listed in table 11.2. The block diagram of unit 0 is shown
in figure 11.1 and the block diagram of unit 1 is shown in figure 11.2.
The descriptions in this section refer to unit 0.
11.1
• Maximum 32-pulse input/output (unit 0: 16, unit 1: 16, when the EXPE bit is 0 in single-chip
• Selection of 8 counter input clocks for each channel
• The following operations can be set for each channel:
• Buffer operation settable for channels 0 (6) and 3 (9)
• Phase counting mode settable independently for each of channels 1 (7), 2 (8), 4 (10), and 5
• Cascaded operation
• Fast access via internal 16-bit bus
• 26 interrupt sources (per unit)
• Automatic transfer of register data
• Programmable pulse generator (PPG) output trigger can be generated (only by unit 0).
• A/D converter conversion start trigger can be generated.
• Module stop state can be set.
• Activation of the DMAC (only by unit 0) and DTC
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
mode)
⎯ Waveform output at compare match
⎯ Input capture function
⎯ Counter clear operation
⎯ Synchronous operations:
⎯ Maximum of 15-phase PWM output possible by combination with synchronous operation
(11)
Multiple timer counters (TCNT) can be written to simultaneously.
Simultaneous clearing by compare match and input capture possible
Register simultaneous input/output possible by counter synchronous operation
Features
Section 11 16-Bit Timer Pulse Unit (TPU)
Section 11 16-Bit Timer Pulse Unit (TPU)
Page 701 of 1372

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