R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 419

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
Section 7 DMA Controller (DMAC)
DREQ pin sampling is performed every cycle, with the rising edge of the next φ cycle after the
end of the DMABCR write cycle for setting the transfer enabled state as the starting point.
When the DREQ pin low level is sampled while acceptance by means of the DREQ pin is
possible, the request is held in the DMAC. Then, when activation is initiated in the DMAC, the
request is cleared, and DREQ pin high level sampling for edge detection is started. If DREQ pin
high level sampling has been completed by the time the DMA single cycle ends, acceptance
resumes after the end of the single cycle, DREQ pin low level sampling is performed again, and
this operation is repeated until the transfer ends.
REJ09B0466-0350 Rev. 3.50
Page 389 of 1372
Jul 09, 2010

Related parts for R4F24269NVFQV