R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 879

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
13.8.4
If compare match events A and B occur at the same time, the 8-bit timer operates in accordance
with the priorities for the output statuses set for compare match A and compare match B, as shown
in table 13.5.
Table 13.5 Timer Output Priorities
13.8.5
TCNT may increment erroneously when the internal clock is switched over. Table 13.6 shows the
relationship between the timing at which the internal clock is switched (by writing to the CKS1,
CKS0, ICKS1, and ICKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the rising edge or falling edge of the
internal clock pulse is detected. Therefore, when the falling edge is selected, if clock switching
causes a change from high to low level, as shown in case 3 in table 13.6, a TCNT clock pulse is
generated and the TCNT incremented on the assumption that the switchover is a falling edge. This
is the same as when the rising edge is selected.
The erroneous incrementation can also happen when switching between the rising edge and falling
edge of an internal clock or switching between internal and external clocks.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Output Setting
Toggle output
1 output
0 output
No change
Contention between Compare Matches A and B
Switching of Internal Clocks and TCNT Operation
Section 13 8-Bit Timers (TMR)
Priority
High
Low
Page 849 of 1372

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