HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 383

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

No
No
Read receive data in RDR, and
clear RDRF flag in SSR to 0
PER ∨ FER ∨ ORER = 1
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read ORER, PER, and
Figure 14.9 Sample Serial Reception Data Flowchart (1)
All data received?
FER flags in SSR
Start reception
Initialization
RDRF = 1
<End>
Yes
Yes
No
(Continued on next page)
Error processing
Yes
[1]
[2]
[4]
[5]
[3]
Section 14 Serial Communication Interface (SCI)
[1] SCI initialization:
[2] [3] Receive error processing and break
[4] SCI status check and receive data read:
[5] Serial reception continuation procedure:
Rev. 7.00 Sep. 11, 2009 Page 347 of 566
The RxD pin is automatically
designated as the receive data input
pin.
detection:
If a receive error occurs, read the
ORER, PER, and FER flags in SSR to
identify the error. After performing the
appropriate error processing, ensure
that the ORER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
Read SSR and check that RDRF = 1,
then read the receive data in RDR and
clear the RDRF flag to 0. Transition of
the RDRF flag from 0 to 1 can also be
identified by an RXI interrupt.
To continue serial reception, before the
stop bit for the current frame is
received, read the RDRF flag, read
RDR, and clear the RDRF flag to 0.
The RDRF flag is cleared automatically
when DTC is activated by an RXI
interrupt and the RDR value is read.
REJ09B0211-0700