DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 218

IC H8S/2265 MCU FLASH 100TQFP

DF2265TE13V

Manufacturer Part Number
DF2265TE13V
Description
IC H8S/2265 MCU FLASH 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2265TE13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2265TE13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 I/O Ports
9.7.2
PHDR stores output data for port H.
9.7.3
PORTH shows the pin states and cannot be modified.
Note: * Determined by the states of pins PH7 and PH3 to PH0.
9.7.4
Port H pins also function as a DTMF generation circuit analog output pin (TONED) * , 8-bit reload
timer input pin (TMCI4) * , and LCD driver common output pins (COM4 to COM1). Port H pin
functions are shown below.
Note: * Supported only by the H8S/2268 Group.
Rev. 5.00 Sep. 01, 2009 Page 166 of 656
REJ09B0071-0500
Bit
7 to 4
3
2
1
0
Bit
7
6 to 4
3
2
1
0
Bit Name
PH3DR
PH2DR
PH1DR
PH0DR
Bit Name
PH7
PH3
PH2
PH1
PH0
Port H Data Register (PHDR)
Port H Register (PORTH)
Pin Functions
Initial
Value
Undefined ⎯
0
0
0
0
Initial
Value
⎯*
Undefined ⎯
⎯*
⎯*
⎯*
⎯*
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
Output data for a pin is stored when the pin is specified
as a general purpose output port.
Description
When this bit is read, PH7 pin status is always read.
Reserved
These bits are always read as undefined value and
cannot be modified.
If these bits are read while the corresponding PHDDR
bits are set to 1, the PHDR value is read. If these bits
are read while PHDDR bits are cleared to 0, the pin
states are read.

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