DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 75

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.4.2
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an
instruction is fetched, the least significant PC bit is regarded as 0.)
2.4.3
EXR is an 8-bit register that manipulates the LDC, STC, ANDC, ORC, and XORC instructions.
When these instructions except for the STC instruction is executed, all interrupts including NMI
will be masked for three states after execution is completed.
Bit
7
6 to 3
2
1
0
Bit Name
T
⎯
I2
I1
I0
Program Counter (PC)
Extended Control Register (EXR) (H8S/2268 Group Only)
Initial
Value
0
1
1
1
1
SP (ER7)
R/W
R/W
⎯
R/W
R/W
R/W
Figure 2.8 Stack Status
Description
Trace Bit
When this bit is set to 1, a trace exception is generated
each time an instruction is executed. When this bit is
cleared to 0, instructions are executed in sequence.
Reserved
These bits are always read as 1.
These bits designate the interrupt mask level (0 to 7). For
details, refer to section 5, Interrupt Controller.
Rev. 5.00 Sep. 01, 2009 Page 23 of 656
Stack area
Free area
REJ09B0071-0500
Section 2 CPU