DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 580

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 ROM
Rev. 5.00 Sep. 01, 2009 Page 528 of 656
REJ09B0071-0500
Notes:
1. Pre-writing (all erase block data are cleared to 0) is not necessary.
2. Verify data is read out in 16 bit size (word access).
3. Erasing block register (EBR) can be set about 1 bit at a time.
4. Erasing is performed block by block. when multiple blocks must be erased,
Increment address
Do not specify 2 bits or more.
erase each lock one by one.
Figure 20.11 Erase/Erase-Verify Flowchart
No
No
Set block start address as verify address
H'FF dummy write to verify address
SWE1 bit in FLMCR1 ← 1
SWE1 bit in FLMCR1 ← 0
ESU1 bit in FLMCR1 ← 1
ESU1 bit in FLMCR1 ← 0
EV1 bit in FLMCR1 ← 1
EV1 bit in FLMCR1 ← 0
All erase block erased?
E1 bit in FLMCR1 ← 1
E1 bit in FLMCR1 ← 0
Last address of block?
*4
Verify data = all 1?
tcswe: Wait 100 μs
tsesu: Wait 100 μs
tcesu: Wait 10 μs
Read verify data
tsswe: Wait 1 μs
tsev: Wait 20 μs
tse: Wait 10 ms
tsevr: Wait 2 μs
tce: Wait 10 μs
tcev: Wait 4 μs
End of erasing
Set EBR1 (2)
Disable WDT
Enable WDT
Erase start
n = 1
Yes
Yes
Yes
*1
No
*3
*2
SWE1 bit in FLMCR1 ← 0
EV1 bit in FLMCR1 ← 0
start erasing
stop erasing
tcswe: Wait 100 μs
tcev: Wait 4 μs
Erase failure
n ≥ 100?
Erasing should be
done to a block
Yes
No
n ← n + 1