DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 599

IC H8S/2265 MCU FLASH 100TQFP

DF2265TE13V

Manufacturer Part Number
DF2265TE13V
Description
IC H8S/2265 MCU FLASH 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2265TE13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2265TE13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.3
The duty adjustment circuit is valid when oscillation frequency is more than 5 MHz. The duty
adjustment circuit adjusts clock output fr/m the system clock oscillator to generate the system
clock (φ).
21.4
The medium-speed clock divider divides the system clock to generate φ/2, φ/4, φ/8, φ/16, and
φ/32.
21.5
The bus master clock selection circuit selects the clock supplied to the bus master by setting the
bits SCK2 to SCK0 in SCKCR. The bus master clock can be selected from system clock (φ), or
medium-speed clocks (φ/2, φ/4, φ/8, φ/16, φ/32).
Operation
External
clock 1
External
clock 2
Port output
External
clock
switching
circuit
EXTAL
Internal
clock φ
External
interrupt
Clock switching
Duty Adjustment Circuit
Medium-Speed Clock Divider
Bus Master Clock Selection Circuit
request
(1)
Figure 21.7 External Clock Switching Timing (Examples)
(1) Port output (clock switching)
(2) Transition to software standby mode
(3) External clock switchover
(4) External interrupt generation
(5) Interrupt exception handling
SLEEP instruction
Active (external clock2)
(An interrupt should be input 200 ns or more after transition to software standby mode.)
execution
(2)
200ns or more
(3)
Software standby mode
Rev. 5.00 Sep. 01, 2009 Page 547 of 656
(4)
Standby mode
Section 21 Clock Pulse Generator
(5)
Interrupt exception handling
Active (external clock1)
REJ09B0071-0500

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