DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 601

IC H8S/2265 MCU FLASH 100TQFP

DF2265TE13V

Manufacturer Part Number
DF2265TE13V
Description
IC H8S/2265 MCU FLASH 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2265TE13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2265TE13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.6.2
If no subclock is required, connect the OSC1 pin to Vss and leave OSC2 open, as shown in figure
21.10. Set the SUBSTP bit of LPWRCR to 1.
21.7
To eliminate noise from the subclock input to OSCI, the subclock is sampled using the dividing
clock φ. The sampling frequency is set using the NESEL bit of LPWRCR. For details, see section
21.1.2, Low Power Control Register (LPWRCR).
No sampling is performed in sub-active mode, sub-sleep mode, or watch mode.
21.8
21.8.1
As various characteristics related to the crystal resonator are closely linked to the user's board
design, thorough evaluation is necessary on the user's part, using the resonator connection
examples shown in this section as a guide. As the resonator circuit ratings will depend on the
floating capacitance of the resonator and the mounting circuit, the ratings should be determined in
consultation with the resonator manufacturer. The design must ensure that a voltage exceeding the
maximum rating is not applied to the oscillator pin.
Handling Pins when Subclock not Required
Subclock Waveform Generation Circuit
Usage Notes
Note on Crystal Resonator
Figure 21.10 Pin Handling When Subclock Not Required
OSC2
OSC1
Open
Rev. 5.00 Sep. 01, 2009 Page 549 of 656
Note: Set the SUBSTP
bit in LPWRCR to 1.
Section 21 Clock Pulse Generator
REJ09B0071-0500

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