AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 101

IC MCU FLASH MP3 DECODER 80-TQFP

AT80C51SND1C-ROTIL

Manufacturer Part Number
AT80C51SND1C-ROTIL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51SND1C-ROTIL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
AT80C51SND1CROTIL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51SND1C-ROTIL
Manufacturer:
Atmel
Quantity:
10 000
4109L–8051–02/08
Reset Value = 0001 0000b
Table 95. UEPNUM Register
UEPNUM (S:C7h) – USB Endpoint Number
Reset Value = 0000 0000b
Table 96. UEPCONX Register
UEPCONX (S:D4h) – USB Endpoint X Control Register (X = EPNUM set in UEPNUM)
Number
Number
EPEN
7 - 6
2 - 1
7 - 2
1 - 0
Bit
Bit
5
4
3
0
7
7
-
EWUPCPU
Mnemonic Description
Mnemonic Description
EPNUM1:0
EEOFINT
ESOFINT
NAKIEN
ESPINT
Bit
Bit
6
6
-
-
-
-
Reserved
The value read from these bits is always 0. Do not set these bits.
Wake Up CPU Interrupt Enable Bit
Set to enable the Wake Up CPU interrupt.
Clear to disable the Wake Up CPU interrupt.
End Of Reset Interrupt Enable Bit
Set to enable the End Of Reset interrupt. This bit is set after reset.
Clear to disable End Of Reset interrupt.
Start Of Frame Interrupt Enable Bit
Set to enable the SOF interrupt.
Clear to disable the SOF interrupt.
Reserved
The value read from these bits is always 0. Do not set these bits.
Suspend Interrupt Enable Bit
Set to enable Suspend interrupt.
Clear to disable Suspend interrupt.
Reserved
The value read from these bits is always 0. Do not set these bits.
Endpoint Number Bits
Set this field with the number of the endpoint which should be accessed when
reading or writing to registers UEPSTAX, UEPDATX, UBYCTX or UEPCONX.
NAKOUT
5
5
-
NAKIN
4
4
-
DTGL
3
3
-
AT8xC51SND1C
EPDIR
2
2
-
EPTYPE1
EPNUM1
1
1
EPTYPE0
EPNUM0
0
0
101

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