AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 136
AT80C51SND1C-ROTIL
Manufacturer Part Number
AT80C51SND1C-ROTIL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT80C51SND1C-ROTIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
AT80C51SND1CROTIL
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18.3.1
18.3.2
136
AT8xC51SND1C
Transmission (Mode 0)
Reception (Mode 0)
Figure 18-3. Serial I/O Port Block Diagram (Mode 0)
To start a transmission mode 0, write to SCON register clearing bits SM0, SM1.
As shown in Figure 18-4, writing the Byte to transmit to SBUF register starts the transmission.
Hardware shifts the LSB (D0) onto the RXD pin during the first clock cycle composed of a high
level then low level signal on TXD. During the eighth clock cycle the MSB (D7) is on the RXD
pin. Then, hardware drives the RXD pin high and asserts TI to indicate the end of the
transmission.
Figure 18-4. Transmission Waveforms (Mode 0)
To start a reception in mode 0, write to SCON register clearing SM0, SM1 and RI bits and setting
the REN bit.
As shown in Figure 18-5, Clock is pulsed and the LSB (D0) is sampled on the RXD pin. The D0
bit is then shifted into the shift register. After eight samplings, the MSB (D7) is shifted into the
shift register, and hardware asserts RI bit to indicate a completed reception. Software can then
read the received Byte from SBUF register.
Figure 18-5. Reception Waveforms (Mode 0)
Write to SCON
Write to SBUF
SCON.6
SCON.1
M3 M2 M1 M0
SM1
Mode Decoder
TI
Controller
RXD
RXD
TXD
TXD
Mode
RI
TI
SCON.7
SCON.0
SM0
RI
Set REN, Clear RI
D0
D0
D1
D1
CLOCK
CLOCK
BRG
PER
D2
D2
D3
D3
SBUF Rx SR
SBUF Tx SR
Baud Rate
Controller
D4
D4
D5
D5
D6
D6
D7
D7
4109L–8051–02/08
RXD
TXD
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