AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 87

• Manufacturer Part Number: AT80C51SND1C-ROTIL
• Description: IC MCU FLASH MP3 DECODER 80-TQFP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51SND1C-ROTIL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Type: ROMless
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: AT80C51SND1CROTIL

15.3.3
Figure 15-8. Endpoint FIFO Configuration
15.4
15.4.1
4109L–8051–02/08
Bulk/Interrupt Transactions
Endpoint 0
Endpoint 2
FIFO Mapping
Bulk/Interrupt OUT Transactions in Standard Mode
UEPSTA0
UEPSTA2
Warning 1: The Byte counter is not updated.
Warning 2: Do not write more Bytes than supported by the corresponding endpoint.
Bulk and Interrupt transactions are managed in the same way.
Figure 15-9. Bulk/Interrupt OUT transactions in Standard Mode
An endpoint should be first enabled and configured before being able to receive Bulk or Interrupt
packets.
When a valid OUT packet is received on an endpoint, the RXOUTB0 bit is set by the USB con-
troller. This triggers an interrupt if enabled. The firmware has to select the corresponding
endpoint, store the number of data Bytes by reading the UBYCTX register. If the received packet
UEPCON0
UEPCON2
UBYCT2
UBYCT0
OUT
OUT
OUT
OUT
UEPDAT0
UEPDAT2
HOST
DATA0 (n Bytes)
DATA1
DATA1
DATA1
UEPNUM
0
1
2
ACK
NAK
NAK
ACK
UFI
X
RXOUTB0
RXOUTB0
UEPSTAX
SFR Registers
Endpoint FIFO Read Byte 1
Endpoint FIFO Read Byte 2
Endpoint FIFO Read Byte n
Endpoint FIFO Read Byte 1
AT8xC51SND1C
UEPCONX
UBYCTX
Clear RXOUTB0
C51
UEPDATX
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