AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 160
AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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Manufacturer
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21.4
21.4.1
Figure 21-1. SMC Connections to Static Memory Devices
21.5
21.5.1
160
Application Example
Product Dependencies
AT91SAM9261 Preliminary
Hardware Interface
I/O Lines
Static Memory
Controller
A1/NWR2/NBS2
NWR1/NBS1
NWR3/NBS3
NWR0/NWE
A2 - A25
A0/NBS0
D0-D31
NCS0
NCS1
NCS2
NCS3
NCS4
NCS5
NCS6
NCS7
The pins used for interfacing the Static Memory Controller may be multiplexed with the PIO
lines. The programmer must first program the PIO controller to assign the Static Memory Con-
troller pins to their peripheral function. If I/O Lines of the SMC are not used by the application,
they can be used for other purposes by the PIO Controller.
A1/NWR2/NBS2
NWR0/NWE
NRD
NRD
D16 - D23
D0 - D7
D0 - D7
CS
OE
WE
D0 - D7
CS
OE
WE
128K x 8
128K x 8
SRAM
SRAM
A0 - A16
A0 - A16
A2 - A18
A2 - A18
NWR1/NBS1
NWR3/NBS3
D24-D31
D8-D15
NRD
NRD
OE
WE
OE
WE
D0-D7
CS
D0-D7
CS
128K x 8
128K x 8
SRAM
SRAM
A0 - A16
A0 - A16
A2 - A18
A2 - A18
6062M–ATARM–23-Mar-09
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