AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 224
AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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Manufacturer
Quantity
Price
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23.2
23.3
23.3.1
224
Block Diagram
Functional Description
AT91SAM9261 Preliminary
Configuration
Figure 23-1. Block Diagram
The PDC channel user interface enables the user to configure and control data transfers for
each channel. The user interface of each PDC channel is integrated into the associated periph-
eral user interface.
The user interface of a serial peripheral, whether it is full or half duplex, contains four 32-bit
pointers (RPR, RNPR, TPR, TNPR) and four 16-bit counter registers (RCR, RNCR, TCR,
TNCR). However, the transmit and receive parts of each type are programmed differently: the
RECEIVE or TRANSMIT
FULL DUPLEX
HALF DUPLEX
PERIPHERAL
PERIPHERAL
PERIPHERAL
RHR or THR
Control
Control
Control
RHR
THR
THR
RHR
Status & Control
Status & Control
Status & Control
PDC Channel A
PDC Channel B
PDC Channel D
PDC Channel C
PDC
Control
6062M–ATARM–23-Mar-09
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