MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 128

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pulse-Width Modulator (PWM)
11.2 PWM Register Descriptions
This section provides descriptions of the PWM registers.
11.2.1 PWM Clocks and Concatenate Register
Read: Anytime
Write: Anytime
CON23 — Concatenate PWM Channels 2 and 3 Bit
CON01 — Concatenate PWM Channels 0 and 1 Bit
PCKA2–PCKA0 — Prescaler for Clock A Bits
PCKB2–PCKB0 — Prescaler for Clock B Bits
128
When concatenated, channel 2 becomes the high-order byte and channel 3 becomes the low-order
byte. Channel 2 output pin is used as the output for this 16-bit PWM (bit 2 of port P). Channel 3
clock-select control bits determines the clock source.
When concatenated, channel 0 becomes the high-order byte and channel 1 becomes the low-order
byte. Channel 0 output pin is used as the output for this 16-bit PWM (bit 0 of port P). Channel 1
clock-select control bits determine the clock source.
Clock A is one of two clock sources which may be used for channels 0 and 1. These three bits
determine the rate of clock A, as shown in
Clock B is one of two clock sources which may be used for channels 2 and 3. These three bits
determine the rate of clock B, as shown in
0 = Channels 2 and 3 are separate 8-bit PWMs.
1 = Channels 2 and 3 are concatenated to create one 16-bit PWM channel.
0 = Channels 0 and 1 are separate 8-bit PWMs.
1 = Channels 0 and 1 are concatenated to create one 16-bit PWM channel.
Address: $0040
Reset:
Read:
Write:
PCKA2 (PCKB2)
Figure 11-4. PWM Clocks and Concatenate Register (PWCLK)
CON23
0
0
0
0
1
1
1
1
Bit 7
0
Table 11-1. Clock A and Clock B Prescaler
CON01
6
0
PCKA1 (PCKB1)
M68HC12B Family Data Sheet, Rev. 9.1
PCKA2
0
0
1
1
0
0
1
1
5
0
Table
Table
PCKA1
4
0
PCKA0 (PCKB0)
11-1.
11-1.
PCKA0
0
1
0
1
0
1
0
1
3
0
PCKB2
2
0
Value of Clock A (B)
E ÷ 128
E ÷ 16
E ÷ 32
E ÷ 64
PCKB1
E ÷ 2
E ÷ 4
E ÷ 8
E
1
0
Freescale Semiconductor
PCKB0
Bit 0
0