MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 197

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.2.3.3 SCI Control Register 2
Read: Anytime
Write: Anytime
TIE — Transmit Interrupt Enable Bit
TCIE — Transmit Complete Interrupt Enable Bit
RIE — Receiver Interrupt Enable Bit
ILIE — Idle Line Interrupt Enable Bit
TE — Transmitter Enable Bit
RE — Receiver Enable Bit
RWU — Receiver Wakeup Control Bit
SBK — Send Break Bit
Freescale Semiconductor
As long as SBK remains set, the transmitter sends 0s. When SBK is changed to 0, the current frame
of all 0s is finished before the TxD line goes to the idle state. If SBK is toggled on and off, the transmitter
sends only 10 (or 11) 0s and then reverts to mark idle or sending data.
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF status flag or OR status flag is set
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (port S
0 = Receiver disabled
1 = Enables the SCI receive circuitry
0 = Normal SCI receiver
1 = Enables the wakeup function and inhibits further receiver interrupts. Normally, hardware wakes
0 = Break generator off
1 = Generate a break code, at least 10 or 11 contiguous 0s.
bit 1) is dedicated to the transmitter. The TE bit can be used to queue an idle preamble.
the receiver by automatically clearing this bit.
Address:
Reset:
Read:
Write:
$00C3
Bit 7
TIE
0
Figure 14-6. SCI Control Register 2 (SC0CR2)
TCIE
M68HC12B Family Data Sheet, Rev. 9.1
6
0
RIE
5
0
ILIE
4
0
TE
3
0
RE
Serial Communication Interface (SCI)
2
0
RWU
1
0
Bit 0
SBK
0
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