MC56F8323VFB60 Freescale Semiconductor, MC56F8323VFB60 Datasheet - Page 107

• Manufacturer Part Number: MC56F8323VFB60
• Description: IC MPU HYBRID DSP 32K 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8323VFB60

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 27
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• For Use With: MC56F8323EVME - BOARD EVALUATION MC56F8323
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

1. Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application. Determined on 2s2p ther-
2. Junction-to-ambient thermal resistance, Theta-JA (R
3. Junction-to-case thermal resistance, Theta-JC (R
4. Thermal Characterization Parameter, Psi-JT (Ψ
5. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
6. See
7. TJ = Junction temperature
Freescale Semiconductor
Preliminary
mal test board.
in a horizontal configuration in natural convection. Theta-JA was also simulated on a thermal test board with two internal planes
(2s2p, where “s” is the number of signal layers and “p” is the number of planes) per JESD51-6 and JESD51-7. The correct name
for Theta-JA for forced convection or with the non-single layer boards is Theta-JMA.
plate technique with the cold plate temperature used as the "case" temperature. The basic cold plate measurement technique is
described by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when
the package is being used with a heat sink.
ter of case as defined in JESD51-2. Ψ
ments.
ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
TA = Ambient temperature
Junction to ambient
Natural Convection
Junction to ambient (@1m/sec)
Junction to ambient
Natural Convection
Junction to ambient (@1m/sec)
Junction to case
Junction to center of case
I/O pin power dissipation
Power dissipation
Maximum allowed P
Part 12.1
ESD for Human Body Model (HBM)
ESD for Machine Model (MM)
ESD for Change Device Model (CDM)
Table 10-2 56F8323/56F8123 ElectroStatic Discharge (ESD) Protection
Characteristic
for more details on thermal design considerations.
D
Characteristic
Table 10-3 Thermal Characteristics
JT
Four layer board
(2s2p)
Four layer board
(2s2p)
is a useful value to estimate junction temperature in steady-state customer environ-
Comments
56F8323 Technical Data, Rev. 17
JT
), is the "resistance" from junction to reference point thermocouple on top cen-
θJC
θJA
), was simulated to be equivalent to the measured values using the cold
), was simulated to be equivalent to the JEDEC specification JESD51-2
2000
Symbol
Min
200
500
R
R
(2s2p)
R
P
R
R
P
Ψ
DMAX
θJMA
θJMA
θJMA
P
θJA
θJC
I/O
JT
D
P
(TJ - TA) / R
User-determined
Typ
—
—
—
D
64-pin LQFP
= (I
Value
P
DD
41
34
34
29
8
2
I/O
6
x V
)
θ
DD
JA
Max
—
—
—
+
7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
W
W
W
General Characteristics
Unit
V
V
V
Notes
4, 5
1,2
1,2
2
2
3
107