MC56F8323VFB60 Freescale Semiconductor, MC56F8323VFB60 Datasheet - Page 34

• Manufacturer Part Number: MC56F8323VFB60
• Description: IC MPU HYBRID DSP 32K 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8323VFB60

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 27
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• For Use With: MC56F8323EVME - BOARD EVALUATION MC56F8323
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Note: Program RAM is NOT available on the 56F8123 device.
4.3 Interrupt Vector Table
Table 4-3
table is organized with higher-priority vectors at the top and lower-priority interrupts lower in the table.
As indicated, the priority of an interrupt can be assigned to different levels, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see
for the reset value of the VBA.
In some configurations, the reset address and COP reset address will correspond to vector 0 and 1 of the
interrupt vector table. In these instances, the first two locations in the vector table must contain branch or
JMP instructions. All other entries must contain JSR instructions.
Note: PWMA, CAN and Quadrature Decoder are NOT available on the 56F8123 device.
34
core
core
Peripheral
provides the device’s reset and interrupt priority structure, including on-chip peripherals. The
2
3
Number
Vector
P: $1F FFFF
P: $03 0000
P: $02 FFFF
P: $02 F800
P: $02 F7FF
P: $02 1000
P: $02 0FFF
P: $02 0000
P: $01 FFFF
P: $00 4000
P: $00 3FFF
P: $00 0000
Begin/End Address
3
3
Priority
Table 4-3 Interrupt Vector Table Contents
Level
Table 4-2 Program Memory Map at Reset
P:$04
P:$06
Vector Base
Address +
56F8323 Technical Data, Rev. 17
RESERVED
On-Chip Program RAM
4KB
RESERVED
Boot Flash
8KB
Cop Reset Address = $02 0002
Boot Location = $02 0000
RESERVED
Internal Program Flash
32KB
Reserved for Reset Overlay
Reserved for COP Reset Overlay
Illegal Instruction
SW Interrupt 3
Memory Allocation
Interrupt Function
2
1
2
Freescale Semiconductor
Part 5.6.11
Preliminary