MC56F8323VFB60 Freescale Semiconductor, MC56F8323VFB60 Datasheet - Page 114
MC56F8323VFB60
Manufacturer Part Number
MC56F8323VFB60
Description
IC MPU HYBRID DSP 32K 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8123VFBE.pdf
(140 pages)
Specifications of MC56F8323VFB60
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
27
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8323VFB60
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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10.4 Flash Memory Characteristics
10.5 External Clock Operation Timing
114
1. Parameters listed are guaranteed by design.
2. See
3. The high or low pulse width must be no smaller than 8.0ns or the chip will not function.
4. External clock input rise time is measured from 10% to 90%
5. External clock input fall time is measured from 90% to 10%
Frequency of operation (external clock driver)
Frequency of operation (external clock driver)
Clock Pulse Width
External clock input rise time
External clock input fall time
1. There is additional overhead which is part of the programming sequence. See the 56F8300 Peripheral User Manual
2. Specifies page erase time. There are 512 bytes per page in the Data and Boot Flash memories. The Program Flash
Characteristic
Program time
Erase time
Mass erase time
for details. Program time is per 16-bit word in Flash memory. Two words at a time can be programmed within the Pro-
gram Flash module, as it contains two interleaved memories.
module uses two interleaved Flash memories, increasing the effective page size to 1024 bytes.
Figure 10-3
Data Invalid State
2
3
1
for details on using the recommended connection of an external clock driver.
Data1 Valid
Table 10-13 External Clock Operation Timing Requirements
Data1
Characteristic
5
4
Data Active
Table 10-12 Flash Timing Parameters
Figure 10-2 Signal States
2
2
56F8323 Technical Data, Rev. 17
—56F8323
—56F8123
Data2 Valid
Symbol
T
T
Data2
T
erase
prog
me
Symbol
t
t
f
f
t
PW
rise
Min
100
osc
osc
fall
20
20
Tri-stated
Data
Min
3.0
—
—
0
0
Typ
—
—
—
Typ
Data3 Valid
—
—
—
—
—
Data Active
Data3
Max
—
—
—
Freescale Semiconductor
1
Max
120
80
15
15
—
Unit
ms
ms
μs
Preliminary
Unit
MHz
MHz
ns
ns
ns
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