M30260F6AGP#U3 Renesas Electronics America, M30260F6AGP#U3 Datasheet - Page 249

IC M16C MCU FLASH 48K 48LQFP

M30260F6AGP#U3

Manufacturer Part Number
M30260F6AGP#U3
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30260F6AGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
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17. Flash Memory Version
17.1 Flash Memory Performance
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NOTES:
Table 17.1. Flash Memory Version Specifications
0
Flash memory operating mode
Erase block
Program method
Erase method
Program, erase control method
Protect method
Number of commands
Program/Erase
Endurance
Data Retention
ROM code protection
C
The flash memory version is functionally the same as the mask ROM version except that it internally con-
tains flash memory.
In the flash memory version, the flash memory can perform in three rewrite mode : CPU rewrite mode,
standard serial I/O mode and parallel I/O mode.
Table 17.1 shows the flash memory version specifications. (Refer to Table 1.1 or Table 1.2 for the items not
listed in Table 17.1.)
2
9
1. Program and erase endurance definition Program and erase endurance are the erase endurance of each block. If
2. To use the limited number of erasure efficiently, write to unused address within the block instead of rewrite. Erase
0 .
2 /
B
0
the program and erase endurance are n times (n=100,1,000,10,000), each block can be erased n times. For
example, if a 2-Kbyte block A is erased after writing 1 word data 1024 times, each to different addresses, this is
counted as one program and erasure.However, data cannot be written to the same address more than once
without erasing the block. (Rewrite disabled)
block only after all possible address are used. For example, an 8-word program can be written 128 times before
erase is necessary. Maintaining an equal number of erasure between Block A and B will also improve efficiency.
We recommend keeping track of the number of times erasure is used.
0
6
2
A
0
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2
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(1)
1 .
2
0
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, 5
0
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2
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0
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0
1
7
Block 0 to 3 (program area)
Block A and B (data are) (2)
6
Item
C
page 230
2 /
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3
2
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6
, B
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3 modes (CPU rewrite, standard serial I/O, parallel I/O)
In units of word
Block erase
Program and erase controlled by software command
All user blocks are write protected by bit FMR16.
In addition, the block 0 and block 1 are write protected by bit FMR02
5 commands
100 times, 1,000 times (See Tables 1.7, 1.9, and 1.10 )
100 times, 10,000 times (See Tables 1.7, 1.9, and 1.10 )
Parallel I/O and standard serial I/O modes are supported.
See Figure 17.2.1 to 17.2.3 Flash Memory Block Diagram
20 years (Topr = 55 C)
2 /
6
) T
Specification
17. Flash Memory Version

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