M30260F6AGP#U3 Renesas Electronics America, M30260F6AGP#U3 Datasheet - Page 49

• Manufacturer Part Number: M30260F6AGP#U3
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
1
. v
J
6
Figure 5.5.2. VCR1 Register, VCR2 Register, and D4INT Register
0
C
2
9
0 .
2 /
B
0
0
6
2
A
0
F
2
e
G
0 -
b
o r
1 .
2
0
u
, 5
V o l t a g e d e t e c t i o n r e g i s t e r 1
V o l t a g e d e t e c t i o n r e g i s t e r 2 (1)
NOTES:
0 0 0 0
NOTES:
0
b7
b7
V o l t a g e d o w n d e t e c t i o n i n t e r r u p t r e g i s t e r (1)
p
b 7
NOTES:
1. Write to this register after setting the PRC3 bit in the PRCR register to “1” (write enable).
2. When not in stop mode, to use hardware reset 2, set the VC26 bit to “1” (reset level detection circuit enable).
3. VC26 bit is disabled in stop mode. (The microcomputer is not reset even if the voltage input to Vcc pin
4. When the VC13 bit in the VCR1 register and D42 bit in the D4INT register are used or the D40 bit is set to
5. This register does not change at software reset, watchdog timer reset and oscillation stop detection reset.
6. The detection circuit does not start operation until td(E-A) elapses after the VC26 bit, or VC27 bit are set to
1. The VC13 bit is useful when the VC27 bit in the VCR2 register is set to "1" (voltage down detection circuit
2. This register does not change at software reset, watchdog timer reset and oscillation stop detection reset.
2
(
b6
b6
0
b 6
becomes lower than Vdet3.)
“1” (voltage down detection interrupt enable), set the VC27 bit to “1” (voltage down detection circuit enable).
“1”.
M
1. Write to this register after setting the PRC3 bit in the PRCR register to “1” (write enable).
2. Useful when the VC27 bit in the VCR2 register is set to “1” (voltage down detection circuit enabled). If the
3. This bit is set to “0” by writing a “0” in a program. (Writing a “1” has no effect.)
4. If the voltage down detection interrupt needs to be used to get out of stop mode again after once used for
5. The D40 bit is effective when the VC27 bit in the VCR2 register is set to “1”. To set the D40 bit to “1”, follow
enable). The VC13 bit is always "1" (VCC
(voltage down detection circuit disable).
0
VC27 bit is set to “0” (voltage down detection circuit disable), the D42 bit is set to “0” (Not detect).
that purpose, reset the D41 bit by writing a “0” and then a “1”.
the procedure described below.
0
b 5
b 5
1
b 5
7
(1) Set the VC27 bit to “1”.
(2) Wait for td(E-A) until the detection circuit is actuated.
(3) Wait for the sampling time (refer to “Table 5.5.1.2 Sampling Clock Periods”).
(4) Set the D40 bit to “1”.
6
0 0 0 0 0
b 4
b 4
b 4
C
2 /
b 3
b 3
b 3
page 30
6
0 0 0
b 2
b 2
b 2
, A
b 1
b 1
b 1
M
b 0
b 0
b 0
1
f o
6
B i t s y m b o l
B i t s y m b o l
B i t s y m b o l
D 4 0
D 4 1
D 4 2
D43
DF0
D F 1
(b7-b6)
C
( b 2 - b 0 )
VC13
( b 7 - b 4 )
( b 5 - b 0 )
V C 2 6
VC27
3
S y m b o l
D 4 I N T
S y m b o l
V C R 1
S y m b o l
V C R 2
2
2 /
9
6
, B
M
interrupt enable bit (5)
STOP mode deactivation
control bit
(4)
Voltage change detection flag
(2)
WDT overflow detect flag
Sampling clock select bit
Nothing is assigned. When write, set to “0”. When read, its
content is “0”.
Reset level monitor bit
(2, 3, 6)
Voltage down monitor
bit (4, 6)
V o l t a g e d o w n m o n i t o r f l a g
R e s e r v e d b i t
R e s e r v e d b i t
Reserved bit
1
6
(1)
A d d r e s s
0 0 1 F
A d d r e s s
Vdet4) when the VC27 bit in the VCR2 register is set to "0"
A d d r e s s
0 0 1 A
0 0 1 9
C
2 /
Bit name
Bit name
B i t n a m e
1 6
1 6
1 6
6
) T
A f t e r r e s e t ( 2)
A f t e r r e s e t (5)
A f t e r r e s e t
0 0 0 0 1 0 0 0
0 0
0 0
b 5b4
0 : D i s a b l e ( d o n o t u s e t h e v o l t a g e
1 : E n a b l e ( u s e t h e v o l t a g e d o w n
0 :
1 :
0: Not detected
1: Vdet4 passing detection
0 : N o t d e t e c t e d
1 : D e t e c t e d
0 0 : C P U c l o c k d i v i d e d b y 8
0 1 : C P U c l o c k d i v i d e d b y 1 6
1 0 : C P U c l o c k d i v i d e d b y 3 2
1 1 : C P U c l o c k d i v i d e d b y 6 4
1 6
0 : D i s a b l e r e s e t l e v e l d e t e c t i o n
1 : E n a b l e r e s e t l e v e l d e t e c t i o n
0: Disable voltage down
1: Enable voltage down
d o w n d e t e c t i o n
0:V
1:V
1 6
M u s t se t t o “ 0 ”
M u s t s e t t o “ 0 ”
Must set to “0”
i n t e r r u p t t o g e t o u t o f s t o p m o d e )
d e t e c t i o n i n t e r r u p t t o g e t
o u t o f s t o p m o d e )
Disable
Enable
c i r c u i t
c i r c u i t
detection circuit
detection circuit
CC
CC
2
< Vdet4
Vdet4
Function
F unction
F u n c t i o n
RW
RW
RW
RW
RW
R W
R W
(3)
(3)
RW
RW
RW
RW
RW
RW
RW
RO
5. Reset