M30260F6AGP#U3 Renesas Electronics America, M30260F6AGP#U3 Datasheet - Page 268

IC M16C MCU FLASH 48K 48LQFP

M30260F6AGP#U3

Manufacturer Part Number
M30260F6AGP#U3
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30260F6AGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
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E
1
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6
Figure 17.7.5.1. Flow Chart of Block Erase Command (when not using erase suspend function)
0
C
17.7.5 Block Erase
2
9
0 .
B
2 /
0
0
NOTES:
6
2
A
0
By writing ‘xx20
addresse of a block) and the auto-programming/erasing (erase and erase verify) start. The FMR00 bit
in the FMR0 register indicates whether the auto-programming operation has been completed. The
FMR00 bit is set to “0” (busy) during the auto-erasing operation and “1” (ready) when the auto-erasing
operation is completed. When using the erase-suspend function in EW0 mode, the FMR46 bit in the
FMR4 register indicates whether a flash memory has entered erase-suspend mode. The FMR46 bit is
set to “0” during auto-erasing operation and “1” when the auto-erasing operation is completed (enter-
ing erase-suspend). After the completion of an auto-erasing operation, the FMR07 bit in the FMR0
register indicates whether or not the auto erasing-operation has been completed as expected. (Refer
to 17.8.4 Full Status Check). Also, each block disables erasing. (Refer to “Table 17.5.2.1”). Figure
17.7.5.1 shows a flow chart of the block erase command programming when not using the erase-
suspend function. Figure 17.7.5.2 shows a flow chart of the block erase command programming when
using an erase-suspend function. In EW1 mode, do not execute this command on the block where the
rewrite control program is allocated. In EW0 mode, the microcomputer enters read status register
mode as soon as the auto-erasing operation starts and the status register can be read. The SR7 bit in
the status register is set to “0” as soon as the auto-erasing operation starts. This bit is set to “1” when
the auto-erasing operation is completed. The microcomputer remains in read status register mode
until the read array command is written. Also excute the clear status register command and block
erase command at least 3 times until an erase error is not generated when an erase error is gener-
ated.
F
1. Write the command code and data at even address.
2. Refer to "Figure 17.8.4.1. Full Status Check and Handling Porcedure for Each Error".
3. Execute the clear status register command and block erase command at least 3 times until an erase error is
2
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0 -
b
not generated when an erase error is generated.
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2
0
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2
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7
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page 249
2 /
16
6
’ in the first bus cycle and ‘xxD0
, A
M
1
f o
6
C
3
2
2 /
9
Write ‘xxD0
6
, B
Write command code ‘xx20
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block address
Block erase completed
1
Full status check
6
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16
FMR00=1?
2 /
’ to the highest-order
6
Start
) T
YES
(1)
16
’ in the second bus cycle to the highest-order (even
(2,3)
NO
16
(1)
17. Flash Memory Version

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