XR17D152CM-F Exar Corporation, XR17D152CM-F Datasheet - Page 66

• Manufacturer Part Number: XR17D152CM-F
• Description: IC UART PCI BUS DUAL 100TQFP
• Manufacturer: Exar Corporation
• Type: RS- 232 or RS- 422 or RS- 485r

Specifications of XR17D152CM-F

• Number Of Channels: 2, DUART
• Package / Case: 100-TQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.25 V or 5.5 V
• Supply Voltage (min): 4.5 V or 4.75 V
• Supply Current: 4 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• No. Of Channels: 2
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 3V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1288

XR17D152
REV. 1.2.0
GENERAL DESCRIPTION .................................................................................................1
FUNCTIONAL DESCRIPTION ...........................................................................................6
1.0 APPLICATION EXAMPLES ...................................................................................................................7
2.0 XR17D152 REGISTERS .........................................................................................................................9
3.0 CRYSTAL OSCILLATOR / BUFFER ...................................................................................................22
4.0 TRANSMIT AND RECEIVE DATA .......................................................................................................23
5.0 UART ....................................................................................................................................................25
A
F
ORDERING INFORMATION
P
PCI LOCAL BUS INTERFACE.....................................................................................................................3
MODEM OR SERIAL I/O INTERFACE ........................................................................................................3
ANCILLARY SIGNALS.................................................................................................................................4
PPLICATIONS
EATURES
IN
PCI Local Bus Interface ............................................................................................................................................... 6
PCI Local Bus Configuration Space Registers ............................................................................................................ 6
EEPROM Interface ...................................................................................................................................................... 6
2.1 PCI LOCAL BUS CONFIGURATION SPACE REGISTERS .......................................................................... 10
2.2 DEVICE CONFIGURATION REGISTER SET ................................................................................................. 11
4.1 DATA LOADING AND UNLOADING VIA 32-BIT PCI BURST TRANSFERS ............................................... 23
4.2 FIFO DATA LOADING AND UNLOADING THROUGH THE UART CHANNEL REGISTERS, THR AND RHR IN
5.1 PROGRAMMABLE BAUD RATE GENERATOR ........................................................................................... 25
5.2 TRANSMITTER ............................................................................................................................................... 27
F
F
F
F
F
T
T
T
T
F
T
T
F
T
F
F
F
T
F
T
D
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
ABLE
ABLE
IGURE
ABLE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
ESCRIPTIONS
2.2.1 THE INTERRUPT STATUS REGISTER ..................................................................................................................... 14
2.2.2 GENERAL PURPOSE 16-BIT TIMER/COUNTER. [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT 0XXX-XX-
2.2.3 8XMODE [7:0] (DEFAULT 0X00)................................................................................................................................ 17
2.2.4 REGA [15:8] RESERVED ........................................................................................................................................... 17
2.2.5 RESET [23:16] - (DEFAULT 0X00)............................................................................................................................. 17
2.2.6 SLEEP [31:24] - (DEFAULT 0X00)............................................................................................................................. 18
2.2.7 DEVICE IDENTIFICATION AND REVISION ............................................................................................................... 19
2.2.9 MULTI-PURPOSE INPUTS AND OUTPUTS .............................................................................................................. 19
2.2.10 MPIO REGISTER ...................................................................................................................................................... 19
2.2.8 REGB REGISTER ....................................................................................................................................................... 19
4.1.1 NORMAL RX FIFO DATA UNLOADING AT LOCATIONS 0X100 (CHANNEL 0) AND 0X300 (CHANNEL 1)........ 23
4.1.2 SPECIAL RX FIFO DATA UNLOADING AT LOCATIONS 0X180 (CHANNEL 0) AND 0X380 (CHANNEL 1) ........ 24
4.1.3 TX FIFO DATA LOADING AT LOCATIONS 0X100 (CHANNEL 0) AND 0X300 (CHANNEL 1) .............................. 24
5.2.1 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY......................................................................................... 27
5.2.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................. 27
8-BIT FORMAT ............................................................................................................................................... 25
1: PCI L
2: XR17D152 D
3: D
4: D
5: UART C
6: UART C
7: TIMER CONTROL R
8: T
9: T
1. B
2. P
3. T
4. T
5. T
6. T
7. T
8. M
9. T
10. E
11. B
00-00).............................................................................................................................................................................. 16
.....................................................................................................................................................1
RANSMIT AND
YPICAL DATA RATES WITH A
EVICE
EVICE
YPICAL
YPICAL
HE
HE
IMER
YPICAL OSCILLATOR CONNECTIONS
LOCK
IN
ULTIPURPOSE INPUT
................................................................................................................................................1
XTERNAL
AUD
O
XR17D152 R
G
OCAL
UT OF THE
/C
LOBAL
C
C
D
R
HANNEL
HANNEL
.........................................................................................................................................3
ONFIGURATION
ONFIGURATION
OUNTER CIRCUIT
A
A
IAGRAM
ATE
PPLICATION FOR A
PPLICATIONS IN AN
B
US
C
EVICE
I
G
NTERRUPT
LOCK
R
.................................................................................................................................2
C
ENERATOR
ECEIVE
[1:0] I
[1:0] I
XR17D152 ........................................................................................................................................... 2
............................................................................................................................................................. 1
ONFIGURATION
EGISTER
C
C
ONFIGURATION
EGISTERS
ONNECTION FOR
/
NTERRUPT
NTERRUPT
OUTPUT INTERNAL CIRCUIT
D
R
R
R
............................................................................................................................................... 16
ATA
EGISTERS SHOWN IN
EGISTERS SHOWN IN
............................................................................................................................................. 26
EGISTER
S
14.7456 MH
U
ETS
E
R
NIVERSAL
TABLE OF CONTENTS
MBEDDED
...................................................................................................................................... 16
EGISTER IN
S
S
C
..................................................................................................................................... 9
PACE
OURCE
LEARING
, INT0, INT1, INT2
............................................................................................................................... 22
R
EGISTERS
E
R
XTENDED
A
Z CRYSTAL OR EXTERNAL CLOCK AT
S
EGISTERS
E
DD
YSTEM
B
: .................................................................................................................. 15
NCODING
YTE FORMAT
-
IN
BYTE
DWORD
............................................................................................................. 12
C
........................................................................................................... 20
............................................................................................................ 8
D
ARD
ATA
....................................................................................................... 10
..................................................................................................... 15
I
ALIGNMENT
.................................................................................................... 7
AND
R
UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
ALIGNMENT
, 16C550
ATE
INT3 .................................................................................. 15
........................................................................................ 22
................................................................................... 12
COMPATIBLE
............................................................................... 13
16X S
............................................................ 25
AMPLING
.......................................... 26
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