IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 108

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
3.7.17.3
Figure 80
parameters (SS22-SS46) shown in the figure.
108
• All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
• All timings are on pads when SSI is being used for a data transfer.
• ”Tx” and “Rx” refer to the transmit and receive sections of the SSI.
• For internal frame sync operation using external clock, the FS timing is the same as that of Tx Data (for example, during AC97
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
mode of operation).
SS48
SS49
SS50
SS51
ID
shows the timing for the SSI transmitter with external clock.
Oversampling clock high period
Oversampling clock rise time
Oversampling clock low period
Oversampling clock fall time
Note: SRXD Input in Synchronous mode only
AUDn_TXFS (wl)
SSI Transmitter Timing with External Clock
AUDn_TXFS (bl)
AUDn_RXD
AUDn_TXC
AUDn_TXD
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
(Output)
(Input)
(Input)
(Input)
(Input)
Figure 80. SSI Transmitter with External Clock Timing Diagram
Table 82. SSI Receiver Timing with Internal Clock (continued)
SS23
Parameter
SS27
SS22
SS37
SS31
SS44
SS26
SS25
SS38
SS45
SS29
Min.
6.0
6.0
—
—
Table 83
SS24
SS33
SS46
describes the timing
SS39
Freescale Semiconductor
Max.
3.0
3.0
—
—
Unit
ns
ns
ns
ns