IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 50

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 17
Timing parameters for UDMA in-burst are listed in
1
Make t
50
Parameter
There is a special timing requirement in the ATA host that requires the internal DIOW to go only high three clocks after the last
active edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.
tdzfs
tzah
ATA
tack
tenv
tcyc
tcvh
tmli
tdh
tds
trp
on
—
—
and t
shows timing for device-terminated UDMA in-transfer.
off
big enough to avoid bus contention.
Parameter
Spec.
tmli1
tdzfs
tdh1
tack
tenv
tds1
tzah
tcvh
tx1
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
tc1
ton
toff
trp
DATA READ
DATA WRITE
1
DMARQ
DMACK
DIOW
IORDY
ADDR
DIOR
buffer_en
Figure 17. Timing for Device-Terminated UDMA Transfer
tack(min.) = (time_ack × T) – (tskew1 + tskew2)
tenv(min.) = (time_env × T) – (tskew1 + tskew2)
tenv(max.) = (time_env × T) + (tskew1 + tskew2)
tds – (tskew3) – ti_ds > 0
tdh – (tskew3) –ti_dh > 0
(tcyc – tskew) > T
trp(min.) = time_rp × T – (tskew1 + tskew2 + tskew6)
(time_rp × T) – (tco + tsu + 3T + 2 × tbuf + 2 × tcable2) > trfs (drive)
tmli1(min.) = (time_mlix + 0.4) × T
tzah(min.) = (time_zah + 0.4) × T
tdzfs = (time_dzfs × T) – (tskew1 + tskew2)
tcvh = (time_cvh × T) – (tskew1 + tskew2)
ton = time_on × T – tskew1
toff = time_off × T – tskew1
Table 39. Timing Parameters for UDMA In-Burst
tds
tc1
tdh
tc1
tss1
Table
Value
tli5
39.
tzah
tzah
tmli
tmli
ton tdzfs tcvh
tack
toff
Freescale Semiconductor
Required Conditions
should be low enough
tskew3, ti_ds, ti_dh
T big enough
time_mlix
time_dzfs
time_ack
time_env
time_zah
time_cvh
time_rp
time_rp
—