IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 55
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 55 of 154
- Download datasheet (2Mb)
3.7.5
Figure 23
describes the timing parameters (t1–t14) that are shown in the figures. The values shown in timing
diagrams were tested using a worst-case core voltage of 1.1 V, slow pad voltage of 2.68 V, and fast pad
voltage of 1.65 V.
Freescale Semiconductor
(output)
(input)
SCLK
(output)
MOSI
SCLK
(input)
MISO
MISO
MOSI
(input)
RDY
SSn
SSn
and
Configurable Serial Peripheral Interface (CSPI) Timing
Figure 24
t8
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
t6
t6’
t10
t10
t12
t12
provide CSPI master and slave mode timing diagrams, respectively.
t13
t13
t11
t11
Figure 23. CSPI Master Mode Timing Diagram
Figure 24. CSPI Slave Mode Timing Diagram
t1
t1’
t2
t2’
t3
t3’
t4
t4
t4
t4
t7
t7’
t9
t5
t5’
t14
t14
Table 43
55
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