CYRF69213-40LFXC Cypress Semiconductor Corp, CYRF69213-40LFXC Datasheet - Page 3

• Manufacturer Part Number: CYRF69213-40LFXC
• Description: IC PROC 8K FLASH 40VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CYRFr
• Type: Transceiverr

Specifications of CYRF69213-40LFXC

• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: ISM
• Applications: General Purpose
• Power - Output: 4dBm
• Sensitivity: -97dBm
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Receiving: 23.4mA
• Current - Transmitting: 36.6mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Operating Frequency: 2497 MHz
• Operating Supply Voltage: 2.5 V or 3.3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1934

Pinout
Pin Configuration
Document #: 001-07552 Rev. *D
14, 17, 18, 20, 36
3, 7, 16
6, 9, 39
Pin
10
12
13
15
19
21
22
23
24
25
26
27
28
11
1
2
4
5
8
P1.5 / MOSI
P1.2 / V
P1.4 / SCK
P1.3 / nSS
V
RF Bias
Xtal_in
DD_micro
Name
RESV
GND
P0.4
P0.3
P0.1
P2.1
P2.0
V
RF
RF
IRQ
V
NC
D+
D–
bat
CC
p
n
REG
Individually configured GPIO
12 MHz Crystal. External clock in
Connected to pin 24 via 0.047 μ F capacitor
Individually configured GPIO
Individually configured GPIO
Connected to pin 24 via 0.047 μ Fshunt capacitor
GPIO. Port 2 Bit 1
RF pin voltage reference
Differential RF input to/from antenna
Ground
Differential RF to/from antenna
GPIO. Port 2 Bit 0
Reserved. Must connect to GND
Low speed USB I/O
Low speed USB I/O
4.0–5.5 for 12 MHz CPU/4.75–5.5 for 24 MHz CPU
Must be configured as 3.3V output. It must have a 1–2 μ F output capacitor
Slave select SPI Pin
Serial Clock Pin from MCU function to radio function
Interrupt output, configure high/low or GPIO
Master Out Slave In
Figure 1. Pin Diagram: 40-Pin QFN 7 × 7 mm LF48A
RF
XTAL
V
V
P0.4
P0.3
P0.1
P2.1
V
BAT1
V
BAT2
Corner
BIAS
tabs
CC
CC
10
1
2
3
4
5
6
7
8
9
WirelessUSB LP
CYRF69213
* E-PAD Bottom Side
Function
30
29
28
27
26
25
24
23
22
21
XOUT / GPIO
MISO / GPIO
P1.5 / MOSI
IRQ / GPIO
P1.4 / SCK
P1.3 / SS
P1.2 / V
V
D-
D+
DD_Micro
REG_MICRO
CYRF69213
Page 3 of 77
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