XQ2V1000-4BG575N Xilinx Inc, XQ2V1000-4BG575N Datasheet - Page 63

• Manufacturer Part Number: XQ2V1000-4BG575N
• Description: FPGA 650MHZ CMOS1.5V 575-P
• Manufacturer: Xilinx Inc
• Series: QPro™ Virtex™-IIr

Specifications of XQ2V1000-4BG575N

• Number Of Labs/clbs: 1280
• Total Ram Bits: 737280
• Number Of I /o: 328
• Number Of Gates: 100000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 575-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Other names: Q5801737

Clock Distribution Switching Characteristics
Table 45: Clock Distribution Switching Characteristics
CLB Switching Characteristics
Delays originating at F/G inputs vary slightly according to the input used (see
case. Precise values are provided by the timing analyzer.
Table 46: CLB Switching Characteristics
DS122 (v2.0) December 21, 2007
Product Specification
Global Clock Buffer I input to O output
Global Clock Buffer S input Setup/Hold
to I1 an I2 inputs
Combinatorial Delays
Sequential Delays
Setup and Hold Times Before/After Clock CLK
Clock CLK
Set/Reset
4-input function: F/G inputs to X/Y outputs
5-input function: F/G inputs to F5 output
5-input function: F/G inputs to X output
FXINA or FXINB inputs to Y output via MUXFX
FXINA input to FX output via MUXFX
FXINB input to FX output via MUXFX
SOPIN input to SOPOUT output via ORCY
Incremental delay routing through transparent latch to XQ/YQ outputs
FF Clock CLK to XQ/YQ outputs
Latch Clock CLK to XQ/YQ outputs
BX/BY inputs
DY inputs
DX inputs
CE input
SR/BY inputs (synchronous)
Minimum Pulse Width, High
Minimum Pulse Width, Low
Minimum Pulse Width, SR/BY inputs
Delay from SR/BY inputs to XQ/YQ outputs (asynchronous)
Toggle Frequency (MHz) (for export control)
R
Description
Description
www.xilinx.com
T
T
T
T
T
DXQK
CECK
SRCK
DYCK
T
DICK
T
Symbol
Symbol
T
GSI
T
T
SOPSOP
T
T
T
T
T
F
IFNCTL
T
T
T
INAFX
INBFX
T
T
CKLO
T
IFXY
RPW
IF5X
CKO
TOG
GIO
ILO
IF5
CH
RQ
CL
/T
/T
/T
/T
/T
/T
Figure
GIS
CKDI
CKDY
CKDX
CKCE
SCKR
46). The values listed below are worst-
QPro Virtex-II 1.5V Platform FPGAs
0.33/–0.08
0.33/–0.08
0.33/–0.08
0.21/–0.07
0.23/–0.03
0.61/ 0
0.52
0.39
0.63
0.83
0.39
0.28
0.28
0.38
0.45
0.50
0.59
0.67
0.67
0.67
1.17
750
-5
-5
Speed Grade
Speed Grade
0.37/–0.09
0.37/–0.09
0.37/–0.09
0.24/–0.08
0.26/–0.03
0.70/ 0
0.59
0.44
0.72
0.95
0.45
0.32
0.32
0.44
0.51
0.57
0.68
0.77
0.77
0.77
1.34
650
-4
-4
Units
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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