XQ2V1000-4BG575N Xilinx Inc, XQ2V1000-4BG575N Datasheet - Page 70

• Manufacturer Part Number: XQ2V1000-4BG575N
• Description: FPGA 650MHZ CMOS1.5V 575-P
• Manufacturer: Xilinx Inc
• Series: QPro™ Virtex™-IIr

Specifications of XQ2V1000-4BG575N

• Number Of Labs/clbs: 1280
• Total Ram Bits: 737280
• Number Of I /o: 328
• Number Of Gates: 100000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 575-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Other names: Q5801737

DCM Timing Parameters
All devices are 100% functionally tested. Because of the difficulty in directly measuring many internal timing parameters, those
parameters are derived from benchmark timing patterns. The following guidelines reflect worst-case values across the
recommended operating conditions. All output jitter and phase specifications are determined through statistical measurement
at the package pins.
Operating Frequency Ranges
Table 58: Operating Frequency Ranges
DS122 (v2.0) December 21, 2007
Product Specification
Notes:
1.
2.
3.
Output Clocks (Low Frequency Mode)
Input Clocks (Low Frequency Mode)
Output Clocks (High Frequency Mode)
Input Clocks (High Frequency Mode)
CLK0, CLK90, CLK180, CLK270
CLK2X, CLK2X180
CLKDV
CLKFX, CLKFX180
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
PSCLK
CLK0, CLK180
CLKDV
CLKFX, CLKFX180
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
PSCLK
The term DLL outputs is used here to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
If both DLL and CLKFX outputs are used, follow the more restrictive specification.
If the CLKIN_DIVIDE_BY_2 attribute of the DCM is used, then double these values.
R
Description
(1)(3)
(1)(3)
(2)(3)
(2)(3)
CLKOUT_FREQ_1X_LF_Min
CLKOUT_FREQ_1X_LF_Max
CLKOUT_FREQ_2X_LF_Min
CLKOUT_FREQ_2X_LF_Max
CLKOUT_FREQ_DV_LF_Min
CLKOUT_FREQ_DV_LF_Max
CLKOUT_FREQ_FX_LF_Min
CLKOUT_FREQ_FX_LF_Max
CLKIN_FREQ_DLL_LF_Min
CLKIN_FREQ_DLL_LF_Max
CLKIN_FREQ_FX_LF_Min
CLKIN_FREQ_FX_LF_Max
PSCLK_FREQ_LF_Min
PSCLK_FREQ_LF_Max
CLKOUT_FREQ_1X_HF_Min
CLKOUT_FREQ_1X_HF_Max
CLKOUT_FREQ_DV_HF_Min
CLKOUT_FREQ_DV_HF_Max
CLKOUT_FREQ_FX_HF_Min
CLKOUT_FREQ_FX_HF_Max
CLKIN_FREQ_DLL_HF_Min
CLKIN_FREQ_DLL_HF_Max
CLKIN_FRQ_FX_HF_Min
CLKIN_FRQ_FX_HF_Max
PSCLK_FREQ_HF_Min
PSCLK_FREQ_HF_Max
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Symbol
Constraints
QPro Virtex-II 1.5V Platform FPGAs
210.00
420.00
140.00
240.00
210.00
240.00
420.00
420.00
280.00
210.00
320.00
420.00
320.00
420.00
24.00
48.00
24.00
24.00
48.00
48.00
50.00
0.01
0.01
1.50
1.00
3.00
Speed Grade
-5
180.00
360.00
120.00
210.00
180.00
210.00
360.00
360.00
240.00
210.00
270.00
360.00
270.00
360.00
24.00
48.00
24.00
24.00
48.00
48.00
50.00
1.50
1.00
0.01
3.00
0.01
-4
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Units
70