AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 25

• Manufacturer Part Number: AGLE600V2-FGG484
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AGLE600V2-FGG484

• Processor Series: AGLE600
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 270
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 600 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-14 • Different Components Contributing to the Dynamic Power Consumption in IGLOOe Devices
Table 2-15 • Different Components Contributing to the Static Power Consumption in IGLOO Devices
Parameter
P
P
P
P
P
P
P
P
P
P
P
P
P
*
Parameter
P
P
P
P
P
P
P
AC1
AC2
AC3
AC4
AC5
AC6
AC7
AC8
AC9
AC10
AC11
AC12
AC13
DC1
DC2
DC3
DC4
DC5
DC6
DC7
For a different output load, drive strength, or slew rate, Actel recommends using the Actel power calculator or
SmartPower in Actel Libero
Clock contribution of a Global Rib
Clock contribution of a Global Spine
Clock contribution of a VersaTile row
Clock contribution of a VersaTile used as a sequential module
First contribution of a VersaTile used as a sequential module
Second contribution of a VersaTile used as a sequential module
Contribution of a VersaTile used as a combinatorial module
Average contribution of a routing net
Contribution of an I/O input pin (standard-dependent)
Contribution of an I/O output pin (standard-dependent)
Average contribution of a RAM block during a read operation
Average contribution of a RAM block during a write operation
Dynamic contribution for PLL
Power Consumption of Various Internal Resources
For IGLOOe V2 or V5 Devices, 1.5 V DC Core Supply Voltage
For IGLOOe V2 or V5 Devices, 1.5 V DC Core Supply Voltage
Array static power in Active mode
Array static power in Static (Idle) mode
Array static power in Flash*Freeze mode
Static PLL contribution
Bank quiescent power (VCCI-dependent)
I/O input pin static power (standard-dependent)
I/O output pin static power (standard-dependent)
®
Integrated Design Environment (IDE) software.
Definition
Definition
R e v i s i o n 8
Device Specific Static Power (mW)
See
AGLE600
See
See
See
See
See
Table 2-13 on page
See
Table 2-11 on page
Table 2-10 on page
Table 2-11 on page
Table 2-12 on page
See
IGLOOe Low Power Flash FPGAs
Table 2-8 on page
Device-Specific Dynamic
AGLE600
Contributions (µW/MHz)
19.7
4.16
Table 2-13 on page
Table 2-12 on page
1.84
0.057
0.207
0.207
25.00
30.00
0.88
2.70
0.11
0.7
AGLE3000
AGLE3000
12.77
2-7.
2-10.
1.85
2-8.
2-7.
2-8.
2-9.
2-10.
2-9.
2- 11