AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 41

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AGLE600V2-FGG484

Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLE600V2-FGG484

Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-26 • Input Capacitance
Table 2-27 • I/O Output Buffer Maximum Resistances
Symbol
C
C
Standard
3.3 V LVTTL / 3.3 V LVCMOS
3.3 V LVCMOS Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
1.2 V LVCMOS
1.2 V LVCMOS Wide Range
3.3 V PCI/PCI-X
3.3 V GTL
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
2. R
3. R
4. Applicable to IGLOOe V2 devices operating in the 1.2 V core range ONLY.
IN
INCLK
on V
resistances,
http://www.actel.com/techdocs/models/ibis.html.
(PULL-DOWN-MAX)
(PULL-UP-MAX)
CCI
, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
Input capacitance
Input capacitance on the clock pin
Detailed I/O DC Characteristics
4
= (VCCImax – VOHspec) / I
use
= (VOLspec) / I
the
4
Definition
corresponding
OLspec
Drive Strength
Per PCI/PCI-X
specification
O H spec
100 µA
100 µA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
12 mA
16 mA
12 mA
25 mA
4 mA
8 mA
4 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
IBIS
1
R e v i s i o n 8
models
VIN = 0, f = 1.0 MHz
VIN = 0, f = 1.0 MHz
R
PULL-DOWN
Conditions
located
TBD
TBD
TBD
100
100
200
100
200
100
50
25
17
11
50
25
20
11
50
50
20
20
67
33
33
25
11
(Ω)
on
2
IGLOOe Low Power Flash FPGAs
the
Min.
Actel
R
PULL-UP
Max.
TBD
TBD
TBD
300
150
200
100
225
224
112
112
75
50
33
50
40
22
56
56
22
22
75
37
37
75
8
8
website
(Ω)
Units
3
pF
pF
2- 27
at

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