AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 61

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AGLE600V2-FGG484

Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLE600V2-FGG484

Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-65 • 1.2 LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Table 2-66 • 1.2 LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Table 2-67 • Minimum and Maximum DC Input and Output Levels
1.2 V LVCMOS
Wide Range
Drive
Strength
100 µA
Notes:
1. Applicable to V2 devices ONLY.
2. I
3. I
4. Note that 1.2 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT operate at
5. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
6. Currents are measured at 85°C junction temperature.
7. Software default selection highlighted in gray.
Drive Strength
2 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive Strength
2 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
larger when operating outside recommended ranges.
the equivalent software default drive strength. These values are for normal ranges ONLY.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
Equivalent
Software
Strength
Option
Default
Drive
2 mA
1
Timing Characteristics
1.2 V LVCMOS Wide Range
Timing Characteristics
Refer to LVCMOS 1.2 V (normal range)
Commercial-Case Conditions: T
Commercial-Case Conditions: T
1.2 V DC Core Voltage
Speed
Speed
4
Grade t
Grade t
Std.
Std.
Min.
–0.3 0.35 * VCCI 0.65 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 100 100 TBD TBD
(V)
1.55
1.55
DOUT
DOUT
VIL
Max.
(V)
9.92 0.26 2.09 2.95
4.06 0.26 2.09 2.95
t
t
DP
DP
t
t
DIN
DIN
Min.
(V)
VIH
J
J
t
t
PY
PY
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Max
"Timing Characteristics" on page 2-47
(V)
t
t
PYS
PYS
R e v i s i o n 8
t
t
1.10
EOUT
EOUT
1.10
Max.
VOL
(V)
Table 2-7 on page 2-6
Table 2-7 on page 2-6
9.53 7.48 4.02
3.92 3.46 4.01
t
t
ZL
ZL
VOH
Min.
t
t
(V)
ZH
ZH
t
t
LZ
LZ
I
µA µA
OL
IGLOOe Low Power Flash FPGAs
for derating values.
for derating values.
3.67
3.79
t
t
HZ
HZ
I
OH
for worst-case timing.
(mA)
Max.
I
15.31 13.26
OSH
9.71
t
t
ZLS
ZLS
5
(mA)
Max.
I
OSL
t
t
9.24
ZHS
ZHS
5
µA
I
IL
10
2
6
Units
Units
ns
ns
µA
I
2- 47
IH
10
3
6

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