AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 70

• Manufacturer Part Number: AGLE600V2-FGG484
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AGLE600V2-FGG484

• Processor Series: AGLE600
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 270
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 600 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IGLOOe DC and Switching Characteristics
Table 2-92 • Minimum and Maximum DC Input and Output Levels
Figure 2-18 • AC Loading
Table 2-93 • AC Waveforms, Measuring Points, and Capacitive Loads
Table 2-94 • HSTL Class II – Applies to 1.5 V DC Core Voltage
Table 2-95 • HSTL Class II – Applies to 1.2 V DC Core Voltage
2- 56
HSTL
Class II
Drive
Strength
15 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Output drive strength is below JEDEC specification.
Input Low (V)
VREF – 0.1
*
Speed Grade
Std.
Note:
Speed Grade
Std.
Note:
Measuring point = V
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operating conditions where –0.3 V < VIN < VIL.
5
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
HSTL Class II
High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard (EIA/JESD8-6).
IGLOOe devices support Class II. This provides a differential amplifier input buffer and a push-pull output
buffer.
Timing Characteristics
Min.
–0.3 VREF – 0.1 VREF + 0.1
Commercial-Case Conditions: T
Worst-Case VCCI = 1.4 V VREF = 0.75 V
Commercial-Case Conditions: T
Worst-Case VCCI = 1.4 V VREF = 0.75 V
V
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Input High (V)
VIL
VREF + 0.1
t
t
trip
DOUT
0.98
DOUT
1.55
Max.
. See
V
Table 2-22 on page 2-23
2.62
2.93
t
t
DP
DP
Min.
V
Measuring Point* (V)
0.19
0.26
t
t
DIN
DIN
VIH
Test Point
1.77
1.94
0.75
t
t
Max.
J
J
PY
PY
3.6
V
= 70°C, Worst-Case VCC = 1.425 V,
= 70°C, Worst-Case VCC = 1.14 V,
HSTL
Class II
for a complete table of trip points.
t
t
Max.
0.67
1.10
VOL
EOUT
EOUT
0.4
R e visio n 8
V
V
TT
25
VCCI – 0.4
VREF (typ.) (V)
2.66
2.98
20 pF
t
t
ZL
ZL
VOH
Min.
V
0.75
2.40
2.75
t
Table 2-6 on page 2-6
t
Table 2-7 on page 2-6
ZH
ZH
mA mA
I
15 15
OL
t
t
LZ
LZ
I
OH
VTT (typ.) (V)
t
t
HZ
HZ
Max.
mA
I
0.75
OSH
66
3
6.29
8.79
t
t
ZLS
ZLS
for derating values.
for derating values.
Max.
mA
I
OSL
55
t
6.03
t
8.55
ZHS
ZHS
C
3
LOAD
20
µA
I
IL
10 10
Units
Units
(pF)
1
4
ns
ns
µA
I
IH
2
4