AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 35

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AGLE600V2-FGG484

Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLE600V2-FGG484

Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-20 • Summary of Maximum and Minimum DC Input and Output Levels (continued)
I/O
Standard
HSTL (II)
SSTL2 (I)
SSTL2 (II)
SSTL3 (I)
SSTL3 (II)
Notes:
1. Currents are measured at 85°C junction temperature.
2. Applicable to IGLOO V2 devices operating at VCCI ≥ VCC.
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-12 specification.
4. Note that 1.2 V LVCMOS and 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration
5. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
6. Output drive strength is below JEDEC specification.
7. Output Slew Rates can be extracted from
will NOT operate at the equivalent software default drive strength. These values are for normal ranges ONLY.
Strength
15 mA
18 mA
21 mA
15 mA
14 mA
Applicable to Commercial and Industrial Conditions
Drive
6
Equivalent
Strength
Software
Default
15 mA
15 mA
18 mA
14 mA
21 mA
Drive
6
2
Slew
Rate
High –0.3 VREF – 0.1
High –0.3 VREF – 0.2
High –0.3 VREF – 0.2
High –0.3 VREF – 0.2
High –0.3 VREF – 0.2
Min.
V
IBIS
Models, http://www.actel.com/download/ibis/default.aspx.
VIL
Max.
V
R e v i s i o n 8
VREF + 0.1
VREF + 0.2
VREF + 0.2
VREF + 0.2
VREF + 0.2
Min.
V
VIH
Max.
3.6
3.6
3.6
3.6
3.6
V
Max.
VOL
0.54
0.35
0.4
0.7
0.5
V
IGLOOe Low Power Flash FPGAs
VCCI – 0.62 15 15
VCCI – 0.43 18 18
VCCI – 0.4 15 15
VCCI – 1.1 14 14
VCCI – 0.9 21 21
VOH
Min.
V
I
mA mA
OL
1
I
2- 21
OH
1

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