MT47H32M16HR-3:F Micron Technology Inc, MT47H32M16HR-3:F Datasheet - Page 111

IC DDR2 SDRAM 512MBIT 3NS 84FBGA

MT47H32M16HR-3:F

Manufacturer Part Number
MT47H32M16HR-3:F
Description
IC DDR2 SDRAM 512MBIT 3NS 84FBGA
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet

Specifications of MT47H32M16HR-3:F

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-TFBGA
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1466

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT47H32M16HR-3:F
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT47H32M16HR-3:F
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
MT47H32M16HR-3:F
Quantity:
28 000
Part Number:
MT47H32M16HR-3:F(D9JLR)
Manufacturer:
TOSH
Quantity:
1 225
Part Number:
MT47H32M16HR-3:F(D9JLR)
Manufacturer:
MICRON
Quantity:
1 000
Part Number:
MT47H32M16HR-3:FTR
Manufacturer:
MICRON/镁光
Quantity:
20 000
Figure 64: WRITE – DM Operation
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. R 12/10 EN
DQS, DQS#
Bank select
Command
Address
CK#
CKE
A10
DQ 7
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
RA
T1
t CK
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4, AL = 1, and WL = 2 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T11.
5.
6. Subsequent rising DQS signals must align to the clock within
7. DI n = data-in for column n; subsequent elements are applied in the programmed order.
8.
9.
NOP 1
T2
these times.
t
t
t
t CH
WR starts at the end of the data burst regardless of the data mask condition.
DSH is applicable during
DSS is applicable during
t RCD
t CL
Bank x
WRITE 2
Col n
3
T3
AL = 1
NOP 1
T4
WL ± t DQSS (NOM)
WL = 2
NOP 1
t
T5
111
t
DQSS (MAX) and is referenced from CK T7 or T8.
DQSS (MIN) and is referenced from CK T6 or T7.
t WPRE
NOP 1
T6
DI
n
t RAS
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T6n
t DQSL t DQSH t WPST
512Mb: x4, x8, x16 DDR2 SDRAM
NOP 1
6
T7
T7n
NOP 1
T8
Transitioning Data
NOP 1
© 2004 Micron Technology, Inc. All rights reserved.
T9
t
DQSS.
t WR 5
T10
NOP 1
One bank
All banks
Don’t Care
Bank x 4
T11
PRE
WRITE
t RPA

Related parts for MT47H32M16HR-3:F