KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 11

• Manufacturer Part Number: KSZ8893FQL-FX
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893FQL-FX

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 1000Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3273

Micrel, Inc.
KSZ8893FQL
List of Tables
Table 1. TS-1000 Media Converter Mode Selection........................................................................................................ 24
Table 2. Dedicated TS-1000 Pins .................................................................................................................................... 26
Table 3. 10Base-FL Configuration ................................................................................................................................... 27
Table 4. 100Base-SX Configuration................................................................................................................................. 28
Table 5. FX and TX Mode Selection ................................................................................................................................ 29
Table 6. Programmable Current Values for Fiber LED Driver ......................................................................................... 30
Table 7. MDI/MDI-X Pin Definitions ................................................................................................................................. 30
Table 8. MII Signals.......................................................................................................................................................... 38
Table 9. RMII Signal Description...................................................................................................................................... 39
Table 10. RMII Signal Connections.................................................................................................................................. 40
Table 11. SNI Signals....................................................................................................................................................... 40
Table 12. MII Management Interface Frame Format ....................................................................................................... 41
Table 13. Serial Management Interface (SMI) Frame Format ......................................................................................... 41
Table 14. Spanning Tree States ...................................................................................................................................... 42
Table 15. Special Tagging Mode Format ......................................................................................................................... 43
Table 16. STPID Egress Rules (Processor to Switch Port 3) .......................................................................................... 43
Table 17. STPID Egress Rules (Switch Port 3 to Processor) .......................................................................................... 44
Table 18. FID+DA Lookup in VLAN Mode ....................................................................................................................... 45
Table 19. FID+SA Lookup in VLAN Mode ....................................................................................................................... 45
Table 20. KSZ8893FQL SPI Connections ....................................................................................................................... 49
Table 21. Format of Static MAC Table (8 Entries) ........................................................................................................... 97
Table 22. Format of Static VLAN Table (16 Entries)........................................................................................................ 99
Table 23. Format of Dynamic MAC Address Table (1K Entries) ................................................................................... 100
Table 24. Format of “Per Port” MIB Counters ................................................................................................................ 101
Table 25. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets............................................................................ 102
Table 26. Format of “All Port Dropped Packet” MIB Counters....................................................................................... 102
Table 27. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets................................................................ 102
Table 28. EEPROM Timing Parameters ........................................................................................................................ 106
Table 29. SNI Timing Parameters.................................................................................................................................. 107
Table 30. MII Timing Parameters................................................................................................................................... 108
Table 31. RMII Timing Parameters ................................................................................................................................ 109
Table 32. SPI Input Timing Parameters ......................................................................................................................... 110
Table 33. SPI Output Timing Parameters ...................................................................................................................... 111
Table 34. Auto-Negotiation Timing Parameters............................................................................................................. 112
Table 35. Reset Timing Parameters .............................................................................................................................. 113
Table 36. Transformer Selection Criteria ....................................................................................................................... 115
Table 37. Qualified Single Port Magnetics..................................................................................................................... 115
Table 38. Typical Reference Crystal Characteristics ...................................................................................................... 115
11
October 2007
M9999-101607-1.3