KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 39

• Manufacturer Part Number: KSZ8893FQL-FX
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893FQL-FX

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 1000Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3273

Micrel, Inc.
The MII operates in either PHY mode or MAC mode. The data interface is a nibble wide and runs at one-quarter the
network bit rate (not encoded). Additional signals on the transmit side indicate when data is valid or when an error has
occurred during transmission. Similarly, the receive side has signals that convey when the data is valid and without
physical layer errors. For half-duplex operation, the SCOL signal indicates if a collision has occurred during
transmission.
The KSZ8893FQL does not provide the MRXER signal for PHY mode operation and the MTXER signal for MAC mode
operation. Normally, MRXER indicates a receive error coming from the physical layer device and MTXER indicates a
transmit error from the MAC device. Since the switch filters error frames, these MII error signals are not used by the
KSZ8893FQL. So, for PHY mode operation, if the device interfacing with the KSZ8893FQL has an MRXER input pin, it
needs to be tied low. And, for MAC mode operation, if the device interfacing with the KSZ8893FQL has an MTXER
input pin, it also needs to be tied low.
RMII Interface Operation
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). RMII
provides a common interface between physical layer and MAC layer devices, and has the following key characteristics:
The RMII provided by the KSZ8893FQL is connected to the device’s third MAC. It complies with the RMII Specification.
The following table describes the signals used by the RMII bus. Refer to RMII Specification for full detail on the signal
description.
October 2007
1. Supports 10Mbps and 100Mbps data rates.
2. Uses a single 50 MHz clock reference (provided externally).
3. Provides independent 2-bit wide (di-bit) transmit and receive data paths.
4. Contains two distinct groups of signals: one for transmission and the other for reception
Signal Name
REF_CLK
CRS_DV
RX_ER
TX_EN
RXD1
RXD0
TXD1
TXD0
RMII
---
(with respect
to the PHY)
Direction
Output
Output
Output
Output
Input
Input
Input
Input
---
(with respect
(not required)
to the MAC)
Direction
Input or
Output
Output
Output
Output
Input
Input
Input
Input
Table 9. RMII Signal Description
---
RMII
Signal Description
Synchronous 50 MHz clock
reference for receive, transmit
and control interface
Carrier sense/
Receive data valid
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit data bit 1
Transmit data bit 0
Receive error
---
39
KSZ8893FQL RMII
Signal (direction)
REFCLK (input)
SMRXDV (output)
SMRXD[1] (output)
SMRXD[0] (output)
SMTXEN (input)
SMTXD[1] (input)
SMTXD[0] (input)
(not used)
SMTXER* (input)
* Connects to RX_ER
signal of RMII PHY device
M9999-101607-1.3
KSZ8893FQL