KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 79

• Manufacturer Part Number: KSZ8893FQL-FX
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893FQL-FX

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 1000Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3273

Micrel, Inc.
TS-1000 Media Converter Registers
Register 64 (0x40): PHY Address
Register 65 (0x41): Center Side Status
October 2007
7-5
5-3
Bit
Bit
4
3
2
1
0
7
6
2
1
0
Note: This register is managed by the Center side.
Name
Number of Indication
OAM frame(s)
Addr4
Addr3
Addr2
Addr1
Addr0
Name
BUSY
Vendor mode
Reserved
Option b
Option a
Request
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Description
Set the number of Indication OAM frame(s) to be transmitted
for a single OAM status change. This setting is applicable to
only the following three OAM frames: Indicate Center MC
Condition, Indicate Terminal MC Condition, and Loop Mode
Stop Indication.
000 : send 1 OAM frame
001 : send 2 OAM frames
010 : send 3 OAM frames
011 : send 4 OAM frames
100 : send 5 OAM frames
101 : N/A
110 : N/A
111 : N/A
These 5-bits set the PHY addresses for port 1 and port 2.
00000 : N/A
00001 : Port 1 PHY address is 0x1
00010 : Port 1 PHY address is 0x2
…
11101 : Port 1 PHY address is 0x29
11110 : N/A
11111 : N/A
Port 2 PHY address = (Port 1 PHY address) + 1
Note:
In Center side MC mode (pins MCHS,MCCS] = [0,1]), a write
to these bits with port 1’s PHY address is required to enable
port 1 and start the Center side MC.
Description
1 = Indicate MC loop back mode in progress, or receive reply
frame/timeout is pending
0 = Exclude the above situations
1 = Non special vendor mode
0 = Special vendor mode (compare My & LNK Partner Vendor
Info = 0x009099h)
Reserved
Do not change the default values.
1 = Clear status bits S6 to S10 to zero on Terminal MC side
0 = Normal operation – supporting option b
1 = Disable “Indicate Center MC Condition” frame
0 = Enable “Indicate Center MC condition” frame
1 = indicate change of status/value in registers # 0x50h,
0x51h, 0x58h, 0x59h, 0x5Dh, 0x5Eh, 0x5Fh. This bit is self-
cleared after a read.
0 = exclude the above situations
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M9999-101607-1.3
KSZ8893FQL
Default
Default
000
000
0
0
0
0
1
0
0
0
0
0