KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 38

2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )

KSZ8893FQL-FX

Manufacturer Part Number
KSZ8893FQL-FX
Description
2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8893FQL-FX

Controller Type
Ethernet Switch Controller
Interface
MII, RMII, SNI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Power Supply Type
Analog/Digital
Package Type
PQFP
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Data Rate
1000Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3273

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8893FQL-FX
Manufacturer:
Micrel Inc
Quantity:
1 950
Part Number:
KSZ8893FQL-FX
Manufacturer:
FSC
Quantity:
1 800
Part Number:
KSZ8893FQL-FX
Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
skipped and carrier sense is generated immediately, thereby reducing the chance of further collisions and carrier sense
is maintained to prevent packet reception.
To ensure no packet loss in 10 Base-T or 100 Base-TX half duplex modes, the user must enable the following:
Note: These bits are not set as defaults, as this is not the IEEE standard.
Broadcast Storm Protection
The KSZ8893FQL has an intelligent option to protect the switch system from receiving too many broadcast packets. As
the broadcast packets are forwarded to all ports except the source port, an excessive number of switch resources
(bandwidth and available space in transmit queues) may be utilized. The KSZ8893FQL has the option to include
“multicast packets” for storm control. The broadcast storm rate parameters are programmed globally, and can be
enabled or disabled on a per port basis. The rate is based upon a 67ms interval for 100BT and a 500ms interval for
10BT. At the beginning of each interval, the counter is cleared to zero, and the rate limit mechanism starts to count the
number of bytes during the interval. The rate definition is described in register 6 (0x06) and 7 (0x07). The default setting
is 0x63 (99 decimal). This is equal to a rate of 1%, calculated as follows:
Note: 148,800 frames/sec is based on 64-byte block of packets in 100Base-TX with 12 bytes of IPG and 8 bytes of
preamble between two packets.
MII Interface Operation
The Media Independent Interface (MII) is specified in Clause 22 of the IEEE 802.3u Standard. It provides a common
interface between physical layer and MAC layer devices. The MII provided by the KSZ8893FQL is connected to the
device’s third MAC. The interface contains two distinct groups of signals: one for transmission and the other for
reception. The following table describes the signals used by the MII bus.
October 2007
1. Aggressive back-off (register 3 (0x03), bit [0])
2. No excessive collision drop (register 4 (0x04), bit [3])
External MAC
Controller Signals
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
PHY-Mode Connections
148,800 frames/sec * 67ms/interval * 1% = 99 frames/interval (approx.) = 0x63
KSZ8893FQL
PHY Signals
SMTXEN
SMTXER
SMTXD[3]
SMTXD[2]
SMTXD[1]
SMTXD[0]
SMTXC
SCOL
SCRS
SMRXDV
(not used)
SMRXD[3]
SMRXD[2]
SMRXD[1]
SMRXD[0]
SMRXC
Pin
Descriptions
Transmit enable
Transmit error
Transmit data bit 3
Transmit data bit 2
Transmit data bit 1
Transmit data bit 0
Transmit clock
Collision detection
Carrier sense
Receive data valid
Receive error
Receive data bit 3
Receive data bit 2
Receive data bit 1
Receive data bit 0
Receive clock
Table 8. MII Signals
38
External
PHY Signals
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
MAC-Mode Connections
KSZ8893FQL
MAC Signals
SMRXDV
(not used)
SMRXD[3]
SMRXD[2]
SMRXD[1]
SMRXD[0]
SMRXC
SCOL
SCRS
SMTXEN
SMTXER
SMTXD[3]
SMTXD[2]
SMTXD[1]
SMTXD[0]
SMTXC
M9999-101607-1.3
KSZ8893FQL

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