KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 52

2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )

KSZ8893FQL-FX

Manufacturer Part Number
KSZ8893FQL-FX
Description
2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8893FQL-FX

Controller Type
Ethernet Switch Controller
Interface
MII, RMII, SNI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Power Supply Type
Analog/Digital
Package Type
PQFP
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Data Rate
1000Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3273

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8893FQL-FX
Manufacturer:
Micrel Inc
Quantity:
1 950
Part Number:
KSZ8893FQL-FX
Manufacturer:
FSC
Quantity:
1 800
Part Number:
KSZ8893FQL-FX
Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
KSZ8893FQL
Loopback Support
The KSZ8893FQL provides loopback support for remote diagnostic of failure. In loopback mode, the speed at both PHY
ports needs to be set to 100Base-TX. Two types of loopback are supported:
Far-end Loopback and Near-end
(Remote) Loopback.
Far-end Loopback
Far-end loopback is conducted between the KSZ8893FQL’s two PHY ports. The loopback path starts at the
“Originating.” PHY port’s receive inputs (RXP/RXM), wraps around at the “loopback” PHY port’s PMD/PMA, and ends at
the “Originating” PHY port’s transmit outputs (TXP/TXM).
Bit [0] of registers 29 and 45 is used to enable far-end loopback for ports 1 and 2, respectively. Alternatively, the MII
Management register 0, bit [14] can be used to enable far-end loopback.
The far-end loopback path is illustrated in the following figure.
Figure 15. Far-End Loopback Path
52
October 2007
M9999-101607-1.3

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