KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 94

• Manufacturer Part Number: KSZ8893FQL-FX
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893FQL-FX

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 1000Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3273

Micrel, Inc.
Indirect Access Registers
Registers 121 to 131 provide read and write access to the static MAC address table, VLAN table, dynamic MAC
address table, and MIB counters.
Register 121 (0x79): Indirect Access Control 0
Register 122 (0x7A): Indirect Access Control 1
Register 123 (0x7B): Indirect Data Register 8
Register 124 (0x7C): Indirect Data Register 7
Register 125 (0x7D): Indirect Data Register 6
Register 126 (0x7E): Indirect Data Register 5
Register 127 (0x7F): Indirect Data Register 4
October 2007
7-5
3-2
1-0
Bit
Note: A write to register 122 triggers the read/write command. Read or write access is determined by register 121 bit 4.
Bit
7-0
4
Bit
6-3
2-0
Bit
7-0
7-0
7-0
7-0
Bit
Bit
Bit
7
Name
Reserved
Read High / Write Low
Table Select
Indirect Address High
Name
Indirect Address Low
Name
CPU Read Status
Reserved
Indirect Data [66:64]
Name
Indirect Data [63:56]
Name
Indirect Data [55:48]
Name
Indirect Data [47:40]
Name
Indirect Data [39:32]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Description
Reserved
Do not change the default values.
1 = Read cycle
0 = Write cycle
00 = Static MAC address table selected
01 = VLAN table selected
10 = Dynamic MAC address table selected
11 = MIB counter selected
Bits [9:8] of indirect address
Description
Bits [7:0] of indirect address
Reserved
Description
This bit is applicable only for dynamic MAC address table and
MIB counter reads.
1 = read is still in progress
0 = read has completed
Bits [66:64] of indirect data
Description
Bits [63:56] of indirect data
Description
Bits [55:48] of indirect data
Description
Bits [47:40] of indirect data
Description
Bits [39:32] of indirect data
94
M9999-101607-1.3
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
KSZ8893FQL
Default
Default
Default
Default
Default
Default
Default
0000
000
000
00
00
0
0