DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 118

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

12 DEVICE REGISTERS
Ten address lines are used to address the register space. The register Map for the device is shown in
The addressable range for the device is 0000h to 08FFh. Each Register Section is 64 bytes deep. Global Registers
are preserved for software compatibility with multiport devices. The Serial Interface (Line) Registers are used to
configure the serial port and the associated transport protocol. The Ethernet Interface (Subscriber) registers are
used to control and observe the Ethernet port. The registers associated with the MAC must be configured through
indirect register write /read access due to the architecture of the device.
When writing to a register input values for unused bits and registers (those designated with “–“) should be zero
unless specifically noted otherwise, as these bits and registers are reserved. When a register is read from, the
values of the unused bits and registers should be ignored. A latched status bit is set when an event happens and is
cleared when read.
The register details are provided in the following tables.
Table 12-1. Register Address Map
Ethernet
Mapper
Ethernet
Mapper
T1/E1/J1
Port 1 *
T1/E1/J1
Port 2
T1/E1/J1
Port 3
T1/E1/J1
Port 4
MAPPER/
PORT
SELECT
CST=1
CST=1
CST=0
CST=0
CST=0
CST=0
CS=0,
CS=0,
CS=1,
CS=1,
CS=1,
CS=1,
CHIP
REGISTERS
GLOBAL
0000h–
003Fh
ARBITER
0040h–
007Fh
118 of 335
0DBh–
1DBh–
2DBh–
3DBh–
BERT
0EFh
1EFh
2EFh
3EFh
INTERFACE
SERIAL
00C0h–
013Fh
INTERFACE
ETHERNET
0140h–
017Fh
TRANSCEIVERS
000h–0FFh
100h–1FFh
200h–2FFh
300h–3FFh
T1/E1/J1
Table
12-1.