DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 272

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
RFDL register bit definitions when TR.BOCC.4 = 1:
Bit 5: BOC Bit 5 (RBOC5)
Bit 4: BOC Bit 4 (RBOC4)
Bit 3: BOC Bit 3 (RBOC3)
Bit 2: BOC Bit 2 (RBOC2)
Bit 1: BOC Bit 1 (RBOC1)
Bit 0: BOC Bit 0 (RBOC0)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
The receive FDL register (TR.RFDL) reports the incoming FDL or the incoming Fs bits. The LSB is received first.
Bit 7: Receive FDL Bit 7 (RFDL7). MSB of the received FDL code.
Bit 6: Receive FDL Bit 6 (RFDL6)
Bit 5: Receive FDL Bit 5 (RFDL5)
Bit 4: Receive FDL Bit 4 (RFDL4)
Bit 3: Receive FDL Bit 3 (RFDL3)
Bit 2: Receive FDL Bit 2 (RFDL2)
Bit 1: Receive FDL Bit 1 (RFDL1)
Bit 0: Receive FDL Bit 0 (RFDL0). LSB of the received FDL code.
RFDL7
—
7
0
7
0
TR.RFDL (TR.BOCC.4 = 1)
Receive FDL Register
C0h
TR.RFDL (TR.BOCC.4 = 0)
Receive FDL Register
C0h
RFDL6
—
6
0
6
0
RBOC5
RFDL5
5
0
5
0
272 of 335
RBOC4
RFDL4
4
0
4
0
RBOC3
RFDL3
3
0
3
0
RBOC2
RFDL2
2
0
2
0
RBOC1
RFDL1
1
0
1
0
RBOC0
RFDL0
0
0
0
0